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MAC7200 Datasheet(PDF) 196 Page - Freescale Semiconductor, Inc

Part # MAC7200
Description  MAC7200 Microcontroller Family Reference Manual
PDF  976 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MAC7200 Datasheet(HTML) 196 Page - Freescale Semiconductor, Inc

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Boot Assist Module (BAM) Memory Map
MAC7200 Microcontroller Family Reference Manual, Rev. 2
118
Freescale Semiconductor
9.14
Boot Assist Module (BAM) Memory Map
The BAM, unlike other resources, is not software relocatable in the system, and is always present at $A000
0000, regardless of chip mode. When JTAG Lockout Recovery is triggered, the BAM is mirrored to
address $0000 0000, and the Lockout Recovery firmware is executed after reset. Although it is generally
not used by the application, it is accessible in software at address $A000 0000.
9.15
Exception Table Memory Map
The ARM7 exception vector table is located at $0000 0000 to $0000 001F, and may not be relocated either
at reset or after reset. Please refer to Chapter 7, “Exceptions” for more details on exceptions.
$0000 7DF0
HBL Register Shadow
$0000 7DF8
SLL Register Shadow
$0000 7E00
PFCR2 (BIU2) Register Shadow
$0000 7E08
PFSACC (BIU3) Register Shadow
$0000 7E10
PFDACC (BIU4) Register Shadow
$0000 7E18
$0000 7FFF
Shadow Block (User Area)
1. This memory map is assuming a 32K Shadow Block. If the size of the Shadow Block
changes, the registers will move accordingly (i.e.-the registers are always placed at the
end of the Shadow Block in order to allow the maximum amount of contiguous user area
possible).
Table 9-17. Boot Assist Module (BAM) Memory Map
Address Offset
Function
$0000 0000
$1FFF FFFF
BAM
Table 9-18. Exception Table Memory Map
Address Offset
Function
$0000 0000
Reset exception
$0000 0004
Undefined Instruction exception
$0000 0008
Software Interrupt (SWI) exception
$0000 000c
Prefetch Abort exception
$0000 0010
Data Abort exception
$0000 0014
Reserved
Table 9-16. Shadow Block Memory Map1 (Continued)
Address Offset
Function



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