SPMC68CK338CPV14 datasheet(8/133 Pages) FREESCALE

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MOTOROLA

MC68CK338

MC68CK338TS/D

2.2 MCU Power Connections

2.3 MCU Driver Types

NOTES:

1. HALT and BERR synchronized only if late HALT or BERR.

2. DATA[15:0] synchronized during reset only. MODCLK and QSM pins synchronized only if used as port I/O pins.

PCS0/SS

Yes2

Yes

I/O

PQS3

PCS[3:1]

Yes2

Yes

I/O

PQS[6:4]

RESET

Yes

—

RMC

Yes

I/O

PE3

R/W

Yes

—

RXD

—

Yes

—

SCK

Yes2

Yes

I/O

PQS2

SIZ[1:0]

Yes

I/O

PE[7:6]

TSC

—

Yes

—

TXD

Yes2

Yes

I/O

PQS7

XFC

—

XRTC

—

XTAL

—

Table 3 MCU Power Connections

VDDSYN

Clock Synthesizer

VDDE, VSSE

External periphery power (source and drain)

VDDI, VSSI

Internal module power (source and drain)

VRTC

RTCSM/RAMSM standby power

VSSRTCOSC

Ground connection for real-time clock oscillator

Table 4 MCU Output Driver Types

Type

Description

Output-only signals that are always driven; no external pull-up required

Type A output that can be operated in an open drain mode

Type A output with weak P-channel pull-up during reset

Three-state output that includes circuitry to pull up output before high impedance

is established, to ensure rapid rise time. An external holding resistor is required to

maintain logic level while the pin is in the high-impedance state.

Type B output with weak P-channel pull-up during reset

Type B output that can be operated in an open-drain mode

Table 2 MCU Pin Characteristics (Continued)

Mnemonic

Output

Driver

Input

Synchronized

Input

Hysteresis

Discrete

I/O

Port

Designation

Freescale Semiconductor, Inc.

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