SPMC68CK338CPV14 datasheet(98/133 Pages) FREESCALE

98 / 133 page

MOTOROLA

MC68CK338

MC68CK338TS/D

The DASM is composed of two timing channels (A and B), an output flip-flop, an input edge detector,

some control logic and an interrupt interface. All control and status bits are contained in the DASMSIC

Channel A consists of one 16-bit data register and one 16-bit comparator. To the user, channel B also

appears to consist of one 16-bit data register and one 16-bit comparator, though internally, channel B

has two data registers (B1 and B2). The operating mode determines which register is accessed by the

software. Refer to Table 59.

(measurement or generation) is just one time base bus count. The A and B data registers are always

read/write registers, accessible via the CTM6 submodule bus.

Eleven DASMs are contained in the CTM6. Figure 23 shows a block diagram of the DASM.

Table 58 DASM Modes of Operation

Mode

Description of Mode

DIS

Disabled — I/O pin is placed in a high impedance state

IPWM

Input pulse width measurement — Capture on leading and the trailing edges of an input pulse

IPM

Input period measurement — Capture on two consecutive rising or falling edges of an input pulse

Input capture — Capture on user-specified edge

OCB

Output compare, flag set on channel B match — Generate leading and trailing edges of an output

pulse and set flag on second edge

OCAB

Output compare, flag set on channels A and B match — Generate leading and trailing edges of an

output pulse and set flag on both edges

OPWM

Output pulse width modulation — Generate continuous PWM output with 7, 9, 11, 12, 13, 14, 15, or

16 bits of resolution

Table 59 Channel B Data Register Access

Mode

Data Register

IPWM, IPM, IC

Registers A and B2 are used to hold the captured values. In these modes,

the B1 register is used as a temporary latch for channel B.

OCA, OCAB

Registers A and B2 are used to define the output pulse. Register B1 is not

used in these modes.

OPWM

Registers A and B1 are used as primary registers and hidden register B2 is

used as a double buffer for channel B.

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