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TMS320DM6467 Datasheet(PDF) 21 Page - Texas Instruments |
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TMS320DM6467 Datasheet(HTML) 21 Page - Texas Instruments |
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21 / 357 page ![]() TMS320DM6467 Digital Media System-on-Chip www.ti.com SPRS403F – DECEMBER 2007 – REVISED OCTOBER 2009 Table 3-3. Memory Map Summary MASTER PERIPHERAL ACCESSIBILITY (1) START END SIZE EDMA/ ARM C64x+ Video TSIF ADDRESS ADDRESS (Bytes) PERIPHERAL VDCE EMAC HPI PCI USB VLYNQ ATA Port (0/1) 0x0000 0000 0x0000 3FFF 16K ARM RAM0 (Instruction) 0x0000 4000 0x0000 7FFF 16K ARM RAM1 (Instruction) 0x0000 8000 0x0000 FFFF 32K ARM ROM (Instruction) 0x0001 0000 0x0001 3FFF 16K ARM RAM0 (Data) 0x0001 4000 0x0001 7FFF 16K ARM RAM1 (Data) 0x0001 8000 0x0001 FFFF 32K ARM ROM (Data) Reserved Reserved 0x0002 0000 0x000F FFFF 896K 0x0010 0000 0x003F FFFF 3M 0x0040 0000 0x004F FFFF 1M 0x0050 0000 0x005F FFFF 1M Reserved 0x0060 0000 0x006F FFFF 1M 0x0070 0000 0x007F FFFF 1M 0x0080 0000 0x0080 FFFF 64K 0x0081 0000 0x0081 7FFF 32K Reserved Hole (MPPA Disable) (2) Reserved 0x0081 8000 0x0083 7FFF 128K L2 RAM/Cache 0x0083 8000 0x008F FFFF 800K Reserved 0x0090 0000 0x0092 FFFF 192K 0x0093 0000 0x009F FFFF 832K 0x00A0 0000 0x00DF FFFF 4M Reserved 0x00E0 0000 0x00E0 7FFF 32K L1P RAM/Cache 0x00E0 8000 0x00EF FFFF 992K Reserved 0x00F0 0000 0x00F0 7FFF 32K L1D RAM/Cache Reserved 0x00F0 8000 0x017F FFFF 9184K Reserved 0x0180 0000 0x01BB FFFF 3840K 0x01BC 0000 0x01BC 0FFF 4K ARM ETB Memory 0x01BC 1000 0x01BC 17FF 2K ARM ETB Registers CFG Space 0x01BC 1800 0x01BC 18FF 256 ARM IceCrusher 0x01BC 1900 0x01BC 1BFF 768 Reserved 0x01BC 1C00 0x01BF FFFF 249K 0x01C0 0000 0x0FFF FFFF 228M CFG Bus Peripherals CFG Bus Peripherals CFG Bus Peripherals ü(3) ü(3) ü(3) 0x1000 0000 0x1000 FFFF 64K Reserved 0x1001 0000 0x1001 3FFF 16K ARM RAM0 (Data) ARM RAM0 (Data) ü ü ü ü ü ü ü 0x1001 4000 0x1001 7FFF 16K ARM RAM1 (Data) ARM RAM1 (Data) ü ü ü ü ü ü ü 0x1001 8000 0x1001 FFFF 32K ARM ROM (Data) ARM ROM (Data) ü ü ü ü ü ü ü 0x1002 0000 0x10FF FFFF 16256K 0x1100 0000 0x113F FFFF 4M Reserved 0x1140 0000 0x114F FFFF 1M 0x1150 0000 0x115F FFFF 1M Reserved Reserved 0x1160 0000 0x116F FFFF 1M 0x1170 0000 0x117F FFFF 1M 0x1180 0000 0x1180 FFFF 64K 0x1181 0000 0x1181 7FFF 32K Reserved Hole (MPPA Disable) (2) Reserved 0x1181 8000 0x1183 7FFF 128K L2 RAM/Cache L2 RAM/Cache L2 RAM/Cache ü ü ü ü ü ü 0x1183 8000 0x118F FFFF 800K Reserved Reserved Reserved 0x1190 0000 0x11DF FFFF 5M 0x11E0 0000 0x11E0 7FFF 32K L1P RAM/Cache L1P RAM/Cache L1P RAM/Cache ü ü ü ü ü 0x11E0 8000 0x11EF FFFF 992K Reserved Reserved Reserved (1) These peripherals have their own DMA engine or master port interface to the DMSoC system bus and do not use the EDMA for data transfers. The ü symbol indicates that the peripheral has a valid connection through the device switch fabric to the memory region identified in the EDMA access column. (2) MPPA should be used to disable the hole. For more information on MPPA, see the TMS320C64x+ DSP Megamodule Reference Guide (SPRU871). (3) The HPI's, PCI's, and VLYNQ's access to the configuration bus peripherals is limited, see Table 3-4, Configuration Memory Map Summary for the details. Submit Documentation Feedback Device Overview 21 |
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