TUSB3210 datasheet(14/45 Pages) TI

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2.2.3

PUR_n: GPIO Pullup Register for Port n (n = 0 to 3)

2.2.4

INTCFG: Interrupt Configuration

2.2.5

WDCSR: Watchdog Timer, Control, and Status Register

TUSB3210

Universal Serial Bus

General-Purpose Device Controller

SLLS466F – FEBRUARY 2001 – REVISED AUGUST 2007

PUR_0: GPIO pullup register for port 0

PUR_1: GPIO pullup register for port 1

PUR_2: GPIO pullup register for port 2

PUR_3: GPIO pullup register for port 3

PORT_n.7

PORT_n.6

PORT_n.5

PORT_n.4

PORT_n.3

PORT_n.2

PORT_n.1

PORT_n.0

R/W

BIT

NAME

RESET

FUNCTION

0–7

PORT_n.N

The MCU can write to this register. If the MCU sets this bit to 1, the internal pullup resistor is

(N = 0 to 7)

disconnected from the pin. If the MCU clears this bit to 0, the pullup resistor is connected to the pin.

The pullup resistor is connected to the VCC power supply.

RSV

R/O

R/W

BIT

NAME

RESET

FUNCTION

0–3

I[3:0]

0010

The MCU can write to this register to set the interrupt delay time for port 2 on the MCU. The value of

the lower nibble represents the delay in ms. Default after reset is 2 ms.

I[3:0]

Delay

0000

5 ms

0001

5 ms

0010

2 ms (default)

0011

3 ms

0100

4 ms

0101

5 ms

0110

6 ms

0111

7 ms

1000

8 ms

1001

9 ms

1010

10 ms

1011

5 ms

1100

5 ms

1101

5 ms

1110

5 ms

1111

5 ms

4–7

RSV

Reserved

A watchdog timer (WDT) with 1-ms clock is provided. The watchdog timer works only when a USB

start-of-frame has been detected by the TUSB3210. If this register is not accessed for a period of 32 ms,

the WDT counter resets the MCU (see Figure 2-2, Reset Diagram). When the IDL bit in PCON is set, the

WDT is suspended until an interrupt is detected. At this point, the IDL bit is cleared and the WDT resumes

operation. The WDE bit of this register is cleared only on power up or USB reset (if enabled). When the

MCU writes a 1 to the WDE bit of this register, the WDT starts running. (W/O notation indicates write only

by the MCU.)

Functional Description

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