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SC120 Datasheet(PDF) 25 Page - Semtech Corporation

Part # SC120
Description  Low Voltage Synchronous Boost Regulator
PDF  32 Pages
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

SC120 Datasheet(HTML) 25 Page - Semtech Corporation

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SC120
25
L
T
D
V
dt
V
L
1
I
IN
DT
0
IN
on
L
This is the change in I
L
during the on-state. During the
off-state, again neglecting the p-channel FET R
DS-ON
and
the inductor DCR,
D
1
L
T
V
V
dt
V
V
L
1
I
OUT
IN
T
DT
OUT
IN
off
L
Note that this is a negative quantity, since V
OUT
> V
IN
and
0 < D < 1. For a constant load in steady-state, the inductor
current must satisfy
ΔI
L-on
+
ΔI
L-off
= 0. Substituting the two
expressions and solving for D, obtain D = 1 – V
IN
/V
OUT
.
Using this expression, and the positive valued expression
ΔI
L
=
ΔI
L-on
for current ripple amplitude, obtain expanded
expression for I
L-max
and I
L-min
.
IN
OUT
OUT
IN
IN
OUT
OUT
max,min
L
V
V
V
V
L
2
T
V
I
V
I
If the value of I
OUT
decreases until I
L-min
= 0, which is the
boundary of continuous and discontinuous PWM opera-
tion, the SC120 will transition from PWM operation to
PSAVE operation. Define this value of I
OUT
as I
PSAVE-entry
.
Setting the expression for I
L-min
to 0 and solving,
IN
OUT
2
OUT
IN
entry
PSAVE
V
V
V
V
L
2
T
I
The programmed value of V
OUT
is constant. I
PSAVE-entry
is a
polynomial function of V
IN
. Equating dI
PSAVE-entry
/dV
IN
= 0
and solving for V
IN
reveals that there is one non-zero extre-
mum of this function, a maximum, at V
IN
= 2/
3
V
OUT
.*
Applying this value of V
IN
,
OUT
max
entry
PSAVE
V
27
2
L
T
I
The value of the inductor determines the PSAVE entry
output load current for a given V
IN
. Evaluate I
PSAVE-entry
at the
smallest and largest expected values of V
IN
. If the input
range includes V
IN
=
2/3 V
OUT
, also determine I
PSAVE-entry-max
.
Note that at high V
IN
(V
IN
close to V
OUT
) PSAVE exit may
require an unusually high output load current. In this
case, PSAVE re-entry may be of little concern. So if the
largest V
IN
exceeds approximately 90% of V
OUT
, instead
evaluate PSAVE entry at V
IN
= 0.9V
OUT
.
To ensure that I
PSAVE-entry-max
will be less than the PSAVE exit
current, evaluate the PSAVE-PWM mode transistions while
applying increasing and decreasing loads with V
IN
at and
above
2/3 V
OUT
. This should be done at the application’s
lowest specified ambient temperature as well as at room
temperature. If the PSAVE exit current is not sufficiently
greater than the PSAVE entry current, the separation can
be enhanced by increasing the output capacitance to raise
I
PSAVE-exit
due to the 5μs off-time criterion (see Figure 3), or
by increasing the inductor value to reduce I
PSAVE-entry
.
The inductor selection should also consider the n-channel
FET current limit for the expected range of input voltage
and output load current. The largest I
L-avg
will occur at the
expected smallest V
IN
and largest I
OUT
. Determine the
largest allowable
ΔI
L
, based on the largest expected I
L-avg
,
the minimum n-channel FET current limit, and the
inductor tolerance. Ensure that in the worst case,
I
L-avg
+
ΔI
L
/2 < I
LIM(N)
.
These calculations include the parameter
η, efficiency.
Efficiency varies with V
IN
, I
OUT
, and temperature. Estimate
η
using the plots provided in this datasheet, or from experi-
mental data, at the operating condition of interest when
computing the effect of a new inductor value on PSAVE
entry and I-limit margin.
Any chosen inductor should have low DCR, compared to
the R
DS-ON
of the FET switches, to maintain efficiency,
though for DCR << R
DS-ON
, further reduction in DCR will
provide diminishing benefit. The inductor I
SAT
value should
exceed the expected I
L-max
. The inductor self-resonant fre-
quency should exceed 5×f
osc
. Any inductor with these
properties should provide satisfactory performance.
L = 4.7μH should perform well for most applications. For
high V
OUT
, (4.0V to 5.0V), and relatively high V
IN
(3.3V and
above), L = 6.8μH, along with a larger output capacitance
or larger-package output capacitor (for better V-bias per-
Applications Information (continued)
* For simplicity, efficiency (
η) is represented as a constant. But efficien-
cy, itself a function of V
IN
, decreases with decreasing V
IN
(and decreases
with increasing temperature). Therefore at a given temperature, the
input voltage that produces the maximum PSAVE entry load current
will be slightly greater than 2/
3
of V
OUT
.



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