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DM3725CBC100 Datasheet(PDF) 67 Page - Texas Instruments

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Part # DM3725CBC100
Description  Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DM3725CBC100 Datasheet(HTML) 67 Page - Texas Instruments

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DM3730, DM3725
www.ti.com
SPRS685 – AUGUST 2010
Table 2-3. Ball Characteristics (CUS Pkg.)(1) (continued)
BALL
BALL TOP [2]
PIN NAME
MODE [4]
TYPE [5]
BALL RESET BALL RESET RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
BOTTOM [1]
[3]
STATE [6]
REL. STATE MODE [8]
STRENGTH
/DOWN
[7]
(mA) [11]
TYPE [12]
safe_mode
7
F22
dss_vsync
0
O
H
H
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_68
4
IO
safe_mode
7
J21
dss_acbias
0
O
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_69
4
IO
safe_mode
7
AC19
dss_data0
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart1_cts
2
I
NA
gpio_70
4
IO
8
safe_mode
7
AB19
dss_data1
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart1_rts
2
O
gpio_71
4
IO
safe_mode
7
AD20
dss_data2
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_72
4
IO
safe_mode
7
AC20
dss_data3
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_73
4
IO
safe_mode
7
AD21
dss_data4
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart3_rx_ irrx
2
I
gpio_74
4
IO
safe_mode
7
AC21
dss_data5
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart3_tx_ irtx
2
O
NA
gpio_75
4
IO
8
safe_mode
7
D24
dss_data6
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart1_tx
2
O
gpio_76
4
IO
hw_dbg14
5
O
safe_mode
7
E23
dss_data7
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart1_rx
2
I
gpio_77
4
IO
hw_dbg15
5
O
safe_mode
7
E24
dss_data8
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart3_rx_irrx
2
I
gpio_78
4
IO
hw_dbg16
5
O
safe_mode
7
F23
dss_data9
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
uart3_tx_irtx
2
O
gpio_79
4
IO
hw_dbg17
5
O
safe_mode
7
AC22
dss_data10
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_80
4
IO
safe_mode
7
AC23
dss_data11
0
IO
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_81
4
IO
safe_mode
7
Copyright © 2010, Texas Instruments Incorporated
TERMINAL DESCRIPTION
67
Submit Documentation Feedback
Product Folder Link(s): DM3730 DM3725



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