PIC18LF4331-ESLASHML datasheet(209/392 Pages) MICROCHIP

209 / 392 page

 2010 Microchip Technology Inc.

DS39616D-page 209

PIC18F2331/2431/4331/4431

FIGURE 19-1:

SSP BLOCK DIAGRAM

(SPI MODE)

To enable the serial port, SSP Enable bit, SSPEN

(SSPCON<5>), must be set. To reset or reconfigure

SPI mode, clear bit SSPEN, reinitialize the SSPCON

SDI, SDO, SCK and SS pins as serial port pins. For the

pins to behave as the serial port function, they must

have their data direction bits (in the TRISC register)

appropriately programmed. That is:

• Serial Data Out (SDO) – RC7/RX/DT/SDO or

RD1/SDO

• SDI must have TRISC<4> or TRISD<2> set

• SDO must have TRISC<7> or TRISD<1> cleared

• SCK (Master mode) must have TRISC<5> or

TRISD<3> cleared

• SCK (Slave mode) must have TRISC<5> or

TRISD<3> set

•SS must have TRISA<6> set

Read

Write

Internal

Data Bus

SDI

SDO

SCK

SSPSR Reg

SSPBUF Reg

SSPM<3:0>

bit 0

Shift

Clock

SS Control

Enable

Edge

Select

Clock Select

TMR2 Output

TCY

Prescaler

4, 16, 64

TRISC<3>

Edge

Select

Peripheral OE

Note 1:

When the SPI is in Slave mode, with

the

control

enabled,

(SSPCON<3:0> = 0100),

the

SPI

module will reset if the SS pin is set to

VDD.

If the SPI is used in Slave mode with

CKE = 1, then the SS pin control must be

enabled.

When the SPI is in Slave mode with SS pin

control enabled (SSPCON<3:0> = 0100),

the state of the SS pin can affect the state

read back from the TRISC<6> bit. The

peripheral OE signal from the SSP module

into PORTC controls the state that is read

back from the TRISC<6> bit (see

Section 11.3 “PORTC, TRISC and LATC

Registers”

for information on PORTC). If

Read-Modify-Write instructions, such as

BSF

, are performed on the TRISC register

while the SS pin is high, this will cause the

TRISC<6> bit to be set, thus disabling the

SDO output.

PIC18LF4331-E/ML Datasheet(PDF) 209 Page - Microchip Technology

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