PIC18LF4331-ESLASHML datasheet(270/392 Pages) MICROCHIP

270 / 392 page

PIC18F2331/2431/4331/4431

DS39616D-page 270

 2010 Microchip Technology Inc.

CONFIG5L: CONFIGURATION REGISTER 5 LOW (BYTE ADDRESS 300008h)

U-0

R/C-1

—

—CP3(1,2)

CP2(1,2)

CP1(2)

CP0(2)

bit 7

bit 0

Legend:

R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

U = Unchanged from programmed state

bit 7-4

Unimplemented:

Read as ‘0’

bit 3

CP3:

Code Protection bit(1,2)

= Block 3 is not code-protected

= Block 3 is code-protected

bit 2

CP2:

Code Protection bit(1,2)

= Block 2 is not code-protected

= Block 2 is code-protected

bit 1

CP1:

Code Protection bit(2)

= Block 1 is not code-protected

= Block 1 is code-protected

bit 0

CP0:

Code Protection bit(2)

= Block 0 is not code-protected

= Block 0 is code-protected

Note 1:

Unimplemented in PIC18F2331/4331 devices; maintain this bit set.

Refer to Figure 23-5 for block boundary addresses.

CONFIG5H: CONFIGURATION REGISTER 5 HIGH (BYTE ADDRESS 300009h)

R/C-1

U-0

CPD(1)

CPB(1)

—

bit 7

bit 0

Legend:

R = Readable bit

C = Clearable bit

U = Unimplemented bit, read as ‘0’

-n = Value when device is unprogrammed

U = Unchanged from programmed state

bit 7

CPD:

Data EEPROM Code Protection bit(1)

= Data EEPROM is not code-protected

= Data EEPROM is code-protected

bit 6

CPB:

Boot Block Code Protection bit(1)

= Boot Block is not code-protected

= Boot Block is code-protected

bit 5-0

Unimplemented:

Read as ‘0’

Note 1:

Refer to Figure 23-5 for block boundary addresses.

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