MB96310 datasheet(24/84 Pages) FUJITSU

24 / 84 page

DS07-13808-2E

MB96310 Series

000118H

DMA3 - Buffer address pointer low byte

BAPL3

R/W

000119H

DMA3 - Buffer address pointer middle byte

BAPM3

R/W

00011AH

DMA3 - Buffer address pointer high byte

BAPH3

R/W

00011BH

DMA3 - DMA control register

DMACS3

R/W

00011CH

DMA3 - I/O register address pointer low byte

IOAL3

IOA3

R/W

00011DH

DMA3 - I/O register address pointer high byte

IOAH3

R/W

00011EH

DMA3 - Data counter low byte

DCTL3

DCT3

R/W

00011FH

DMA3 - Data counter high byte

DCTH3

R/W

000120H-

00017FH

Reserved

000180H-

00037FH

CPU - General Purpose registers (RAM access)

GPR_RAM

R/W

000380H

DMA0 - Interrupt select

DISEL0

R/W

000381H

DMA1 - Interrupt select

DISEL1

R/W

000382H

DMA2 - Interrupt select

DISEL2

R/W

000383H

DMA3 - Interrupt select

DISEL3

R/W

000384H-

00038FH

Reserved

000390H

DMA - Status register low byte

DSRL

DSR

R/W

000391H

DMA - Status register high byte

DSRH

R/W

000392H

DMA - Stop status register low byte

DSSRL

DSSR

R/W

000393H

DMA - Stop status register high byte

DSSRH

R/W

000394H

DMA - Enable register low byte

DERL

DER

R/W

000395H

DMA - Enable register high byte

DERH

R/W

000396H-

00039FH

Reserved

0003A0H

Interrupt level register

ILR

ICR

R/W

0003A1H

Interrupt index register

IDX

R/W

0003A2H

Interrupt vector table base register Low

TBRL

TBR

R/W

0003A3H

Interrupt vector table base register High

TBRH

R/W

0003A4H

Delayed Interrupt register

DIRR

R/W

I/O map MB96(F)315x (7 of 22)

Address

Abbreviation

8-bit access

Abbreviation

16-bit access

Access

MB96310 Datasheet(PDF) 24 Page - fujitsu semiconductor

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