M48T37Y datasheet(18/30 Pages) STMICROELECTRONICS

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Clock operations

M48T37Y, M48T37V

18/30

Doc ID 7019 Rev 9

3.9

Battery low flag

The M48T37Y/V automatically performs periodic battery voltage monitoring upon power-up.

The battery low flag (BL), bit D4 of the flags register 7FF0h, will be asserted high if the

SNAPHAT® battery is found to be less than approximately 2.5 V. The BL flag will remain

active until completion of battery replacement and subsequent battery low monitoring tests

during the next power-up sequence.

If a battery low is generated during a power-up sequence, this indicates the battery voltage

is below 2.5 V (approximately), which may be insufficient to maintain data integrity. Data

should be considered suspect and verified as correct. A fresh battery should be installed.

The SNAPHAT top may be replaced while VCC is applied to the device.

Note:

This will cause the clock to lose time during the interval the battery/crystal is removed.

Battery monitoring is a useful technique only when performed periodically. The M48T37Y/V

only monitors the battery when a nominal VCC is applied to the device. Thus applications

which require extensive durations in the battery back-up mode should be powered-up

periodically (at least once every few months) in order for this technique to be beneficial.

Additionally, if a battery low is indicated, data integrity should be verified upon power-up via

a checksum or other technique.

3.10

Initial power-on defaults

Upon application of power to the device, the following register bits are set to a '0' state:

WDS; BMB0-BMB4; RB0-RB1; AFE; ABE; W; R; and FT (see Table 7).

Table 7.

Default values

3.11

VCC noise and negative going transients

ICC transients, including those produced by output switching, can produce voltage

fluctuations, resulting in spikes on the VCC bus. These transients can be reduced if

capacitors are used to store energy which stabilizes the VCC bus. The energy stored in the

bypass capacitors will be released as low going spikes are generated or energy will be

absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1 µF (as shown in

Figure 9) is recommended in order to provide the needed filtering.

In addition to transients that are caused by normal SRAM operation, power cycling can

generate negative voltage spikes on VCC that drive it to values below VSS by as much as

Condition

AFE

ABE

Watchdog

WDS, BMB0-BMB4, RBO, RB1.

Initial power-up

(Battery attach for SNAPHAT®)(2)

State of other control bits undefined.

Subsequent power-up / RESET(3)

State of other control bits remains unchanged.

Power-down(4)

Assuming these bits set to '1' prior to power-down.

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