Implementation

ST7LNB1Y0

8/36

2.2

Application example

Figure 3 and Figure 4 show example application circuits for the ST7LNB1Y0 with and

without legacy signal.

Figure 3.

ST7LNB1Y0 in the Twin SaTCR and legacy (standard RF band) application

1.

The divider chain connected to the DRX1 and DRX2 pins must have the following resistance values: 330K

Ω and 100 KΩ.

2.

3.

RTA-STB: remote tuning able set-top box (STB supporting SaTCR control).

4.

The transistor is optional, it is used for EEPROM parameters bytes reading using DiSEqC.

5.

During normal operation this pin must not be pulled-down.

6.

When the LVD is enabled (default state), it is mandatory not to connect a pull-up resistor. A 10 nF pull-down capacitor is

recommended to filter noise on the reset line.

VSS

VDD

RESET

DTX

DRX1

DRX2

NC

NC

SCL1

SDA1

SCL2

SDA2

SCL3

SDA3

SCL4

SDA4

RTA-STB input

100 K

330 K

100 K

330 K

180 pF

ST7LNB1Y0

33

BC547

220

100 nF

180 F

100 nF

Legacy

OPTIONAL

matrix control

12 K

12 K

12 K

12 K

(5)

100 nF