P89LPC9211FDH datasheet(46/75 Pages) NXP

46 / 75 page

P89LPC92X1

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Product data sheet

Rev. 2 — 1 December 2010

46 of 75

NXP Semiconductors

P89LPC9201/9211/922A1/9241/

8-bit microcontroller with 8-bit ADC

Table 10 shows the factory default Boot Vector setting for these devices. A

factory-provided bootloader is pre-programmed into the address space indicated and

uses the indicated bootloader entry point to perform ISP functions. This code can be

erased by the user.

Remark: Users who wish to use this loader should take precautions to avoid erasing the

1 kB sector that contains this bootloader. Instead, the page erase function can be used to

erase the first eight 64-byte pages located in this sector.

A custom bootloader can be written with the Boot Vector set to the custom bootloader, if

desired.

7.28.10 Hardware activation of the bootloader

The bootloader can also be executed by forcing the device into ISP mode during a

power-on sequence (see the P89LPC9201/9211/922A1/9241/9251 User manual for

specific information). This has the same effect as having a non-zero status byte. This

allows an application to be built that will normally execute user code but can be manually

forced into ISP operation. If the factory default setting for the boot vector is changed, it will

no longer point to the factory pre-programmed ISP bootloader code. After programming

the flash, the status byte should be programmed to zero in order to allow execution of the

user’s application code beginning at address 0000H.

7.29 User configuration bytes

Some user-configurable features of the P89LPC9201/9211/922A1/9241/9251 must be

defined at power-up and therefore cannot be set by the program after start of execution.

These features are configured through the use of the flash byte UCFG1 and UCFG2.

Please see the P89LPC9201/9211/922A1/9241/9251 User manual for additional details.

7.30 User sector security bytes

There are two/four/eight User Sector Security Bytes on the

P89LPC9201/9211/922A1/9241/9251. Each byte corresponds to one sector. Please see

the P89LPC9201/9211/922A1/9241/9251 User manual for additional details.

ADC (P89LPC9241/9251)

8.1 General description

The P89LPC9241/9251 has two analog-to-digital converter modules: ADC0 and ADC1.

ADC1 is an 8-bit, 4-channel multiplexed successive approximation analog-to-digital

converter. ADC0 is dedicated for on-chip temperature sensor which operates over wide

Table 10.

Default boot vector values and ISP entry points

Device

Default

boot vector

Default

bootloader

entry point

Default bootloader

code range

1 kB sector

range

P89LPC9201

07H

0700H

0600H to 07FFH

0400H to 07FFH

P89LPC9211/9241

0FH

0F00H

0E00H to 0FFFH

0C00H to 0FFFH

P89LPC922A1/9251

1FH

1F00H

1E00H to 1FFFH

1C00H to 1FFFH

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