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MM908E624ACEW/R2 Datasheet(PDF) 32 Page - Freescale Semiconductor, Inc |
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MM908E624ACEW/R2 Datasheet(HTML) 32 Page - Freescale Semiconductor, Inc |
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32 / 40 page ![]() Analog Integrated Circuit Device Data 32 Freescale Semiconductor 908E624 TYPICAL APPLICATIONS PCB Level Programming If the IC is soldered onto the PCB board it is typically not possible to separately power the MCU with +5.0 V, the whole system has to be powered up providing VSUP (see Figure 19). Figure 19. Normal Monitor Mode Circuit Table 14 summarizes the possible configurations and the necessary setups. MM908E624 RST_A RST IRQ_A IRQ VREFL VDDA EVDD VDD EVSS AGND VSUP[1:2] GND 4.7µF 100nF PTC4/OSC1 PTB3/AD3 PTB4/AD4 PTA0/KBD0 PTA1/KBD1 WDCONF MAX232 10k RS232 DB-9 1 3 C1+ C1- 4 5 C2+ C2- 7 8 2 3 5 VCC GND 16 15 2 V+ V- 6 1µF + 1µF + + 1µF 1µF + + 1µF 2 1 3 65 4 74HC125 74HC125 9.8304MHz CLOCK VDD VDD DATA CLK VDD 10k 10k 10k VDD VTST VSUP 47µF + 100nF 10 9 T2OUT R2IN T2IN R2OUT 2.2k VREFH VSSA Table 14. Monitor Mode Signal Requirements and Options Mode IRQ RST WDCONF Reset Vector Serial Communication Mode Selection ICG COP Normal Request Timeout Communication Speed PTA0 PTA1 PTB3 PTB4 External Clock Bus Frequenc y Baud Rate Normal Monitor VTST VDD GND X 1 0 0 1 OFF disabled disabled 9.8304 MHz 2.4576 MHz 9600 Forced Monitor VDD VDD GND $FFFF (blank) 10 X X OFF disabled disabled 9.8304 MHz 2.4576 MHz 9600 GND ON disabled disabled — Nominal 1.6MHz Nominal 6300 User VDD VDD REXT not $FFFF (not blank) X X X X ON enabled enabled — Nominal 1.6MHz Nominal 6300 Notes 32. PTA0 must have a pullup resistor to VDD in monitor mode. 33. External clock is a 4.9152 MHz, 9.8304 MHz or 19.6608 MHz canned oscillator on OCS1. 34. Communication speed with external clock is depending on external clock value. Baud rate is bus frequency / 256. 35. X = don’t care. 36. VTST is a high voltage VDD + 3.5 V ≤ VTST ≤ VDD + 4.5 V. |
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