MIC22600_09 datasheet(19/29 Pages) MICREL

19 / 29 page

Micrel, Inc.

MIC22600

October 2009

M9999-102809-C

PCB Layout Guideline

Warning!!! To minimize EMI and output noise, follow

these layout recommendations.

PCB Layout is critical to achieve reliable, stable and

efficient performance. A ground plane is required to

control EMI and minimize the inductance in power,

signal and return paths.

The following guidelines should be followed to insure

proper operation of the MIC22602 converter.

•

Place the IC close to the point of load (POL).

•

Use fat traces to route the input and output power

lines.

•

The exposed pad (EP) on the bottom of the IC must

be connected to the ground.

•

Use several vias to connect the EP to the ground

plane, layer 2.

•

Signal and power grounds should be kept separate

and connected at only one location.

Input Capacitor

•

Place the input capacitor next.

•

Place the input capacitors on the same side of the

board and as close to the IC as possible.

•

Place a 22µF/6.3V ceramic bypass capacitor next to

each of the 4 PVIN pins.

•

Keep both the VIN and PGND connections short.

•

Place several vias to the ground plane close to the

input capacitor ground terminal, but not between the

input capacitors and IC pins.

•

Use either X7R or X5R dielectric input capacitors.

Do not use Y5V or Z5U type capacitors.

•

Do not replace the ceramic input capacitor with any

other type of capacitor. Any type of capacitor can be

placed in parallel with the input capacitor.

•

If a Tantalum input capacitor is placed in parallel

with the input capacitor, it must be recommended for

switching regulator applications and the operating

voltage must be derated by 50%.

•

In “Hot-Plug” applications, a Tantalum or Electrolytic

bypass capacitor must be used to limit the over-

voltage spike seen on the input supply with power is

suddenly applied.

Inductor

•

Keep the inductor connection to the switch node

(SW) short.

•

Do not route any digital lines underneath or close to

the inductor.

•

Keep the switch node (SW) away from the feedback

(FB) pin.

•

To minimize noise, place a ground plane underneath

the inductor.

Output Capacitor

•

Use a wide trace to connect the output capacitor

ground terminal to the input capacitor ground

terminal.

•

Phase margin will change as the output capacitor

value and ESR changes. Contact the factory if the

output capacitor is different from what is shown in

the BOM.

•

The feedback trace should be separate from the

power trace and connected as close as possible to

the output capacitor. Sensing a long high current

load trace can degrade the DC load regulation.

Diode

•

Place the Schottky diode on the same side of the

board as the IC and input capacitor.

•

The connection from the Schottky diode’s Anode to

the input capacitors ground terminal must be as

short as possible.

•

The diode’s Cathode connection to the switch node

(SW) must be keep as short as possible.

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