HT66F13 datasheet(114/173 Pages) HOLTEK

114 / 173 page

fSYS

A/D Clock Period (tADCK)

ADCK2,

ADCK1,

ADCK0

= 000

(fSYS)

ADCK2,

ADCK1,

ADCK0

= 001

(fSYS/2)

ADCK2,

ADCK1,

ADCK0

= 010

(fSYS/4)

ADCK2,

ADCK1,

ADCK0

=011

(fSYS/8)

ADCK2,

ADCK1,

ADCK0

= 100

(fSYS/16)

ADCK2,

ADCK1,

ADCK0

= 101

(fSYS/32)

ADCK2,

ADCK1,

ADCK0

=110

(fSYS/64)

ADCK2,

ADCK1,

ADCK0

= 111

1MHz

ms2ms4ms8ms16ms32ms64ms

Undefined

2MHz

500ns

ms2ms4ms8ms16ms32ms

Undefined

4MHz

250ns*

500ns

ms2ms4ms8ms16ms

Undefined

8MHz

125ns*

250ns*

500ns

ms2ms4ms8ms

Undefined

12MHz

83ns*

167ns*

333ns*

667ns

1.33

2.67

5.33

Undefined

A/D Clock Period Examples

Controlling the power on/off function of the A/D converter circuitry is implemented using the ADOFF

bit in the ADCR0 register. This bit must be zero to power on the A/D converter. When the ADOFF bit is

cleared to zero to power on the A/D converter internal circuitry a certain delay, as indicated in the timing

diagram, must be allowed before an A/D conversion is initiated. Even if no pins are selected for use as

A/D inputs by clearing the ACE3~ACE0 bits in the ACER register, if the ADOFF bit is zero then some

power will still be consumed. In power conscious applications it is therefore recommended that the

ADOFF is set high to reduce power consumption when the A/D converter function is not being used.

The reference voltage supply to the A/D Converter can be supplied from either the positive power

supply pin, VDD, or from an external reference sources supplied on pin VREF. The desired selection is

made using the VREFS bit. As the VREF pin is pin-shared with other functions, when the VREFS bit

is set high, the VREF pin function will be selected and the other pin functions will be disabled

automatically.

A/D Input Pins

All of the A/D analog input pins are pin-shared with the I/O pins on PA3~PA0 as well as other functions.

The ACE3~ ACE0 bits in the ACER register determines whether the input pins are setup as A/D converter

analog inputs or whether they have other functions. If the ACE3~ ACE0 bits for its corresponding pin is set

high then the pin will be setup to be an A/D converter input and the original pin functions disabled. In this

way, pins can be changed under program control to change their function between A/D inputs and other

functions. All pull-high resistors, which are setup through register programming, will be automatically

disconnected if the pins are setup as A/D inputs. Note that it is not necessary to first setup the A/D pin as an

input in the PAC port control register to enable the A/D input as when the ACE3~ ACE0 bits enable an A/D

input, the status of the port control register will be overridden.

The A/D converter has its own reference voltage pin VREF however the reference voltage can also be

supplied from the power supply pin, a choice which is made through the VREFS bit in the ADCR1

HT66F13/HT66F14/HT66F15

Enhanced A/D Flash Type MCU

Rev. 1.10

114

February 9, 2011

P A 0 / A N 0

P A 3 / A N 3

1 . 2 5 V

V 1 2 5 E N

B u f f e r

P B 0 / V R E F

V D D

V R E F S

V R E F

1 2 - b i t A D C

B a n d g a p

R e f e r e n c e

V o l t a g e

I n p u t V o l t a g e

A C S 4 , A C S 1 , A C S 0

A/D Input Structure

HT66F13 Datasheet(PDF) 114 Page - Holtek Semiconductor Inc

HT66F13 Datasheet(HTML) 114 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL