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HT82B40A Datasheet(PDF) 15 Page - Holtek Semiconductor Inc

Part # HT82B40A
Description  I/O MCU with USB Interface
PDF  58 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82B40A Datasheet(HTML) 15 Page - Holtek Semiconductor Inc

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HT82B40R/HT82B40A
Rev. 1.50
15
February 17, 2011
Pin-shared Functions
The flexibility of the microcontroller range is greatly en-
hanced by the use of pins that have more than one func-
tion. Limited numbers of pins can force serious design
constraints on designers but by supplying pins with
multi-functions, many of these difficulties can be over-
come. For some pins, the chosen function of the
multi-function I/O pins is set by configuration options
while for others the function is set by application pro-
gram control.
· External Timer0 Clock Input
The external timer pin TMR0 is pin-shared with the I/O
pin PA6. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation.
· External Timer1 Clock Input
The external timer pin TMR1 is pin-shared with the I/O
pin PA7. To configure this pin to operate as timer input,
the corresponding control bits in the timer control reg-
ister must be correctly set. For applications that do not
require an external timer input, this pin can be used as
a normal I/O pin. Note that if used as a normal I/O pin
the timer mode control bits in the timer control register
must select the timer mode, which has an internal
clock source, to prevent the input pin from interfering
with the timer operation
I/O Pin Structures
The diagram illustrates a generic I/O pin internal struc-
tures. As the exact logical construction of the I/O pin will
differ and as the pin-shared structures are not illustrated
this diagram is supplied as a guide only to assist with the
functional understanding of the I/O pins.
Programming Considerations
Within the user program, one of the first things to con-
sider is port initialisation. After a reset, all of the data and
port control register will be set high. This means that all
I/O pins will default to an input state, the level of which
depends on the other connected circuitry and whether
pull-high options have been selected. If the PAC, PBC,
PCC, PDC and PEC port control register, are then pro-
grammed to setup some pins as outputs, these output
pins will have an initial high output value unless the as-
sociated PA, PB, PC, PD and PE port data registers are
first programmed. Selecting which pins are inputs and
which are outputs can be achieved byte-wide by loading
the correct value into the port control register or by pro-
gramming individual bits in the port control register us-
ing the
²SET [m].i² and ²CLR [m].i² instructions. Note
that when using these bit control instructions, a
read-modify-write operation takes place. The
microcontroller must first read in the data on the entire
port, modify it to the required new bit values and then re-
write this data back to the output ports.
All pins have the additional capability of providing
wake-up functions. When the device is in the Power
Down Mode, various methods are available to wake the
device up. One of these is a high to low transition of any
of the Port pins. Single or multiple pins can be setup to
have this function.
V D D / V 3 3 O ( P B )
M
U
X
W a k e - u p O p t i o n
S y s t e m W a k e - u p
R e a d D a t a R e g i s t e r
D
Q
C K
S
D
Q
C K
S
C o n t r o l B i t
D a t a B u s
W r i t e C o n t r o l R e g i s t e r
C h i p R e s e t
R e a d C o n t r o l R e g i s t e r
W r i t e D a t a R e g i s t e r
D a t a B i t
I / O p i n
Q
Q
W e a k
P u l l - u p
P u l l - H i g h
O p t i o n
Input/Output Ports
T 1
T 2
T 3
T 4
T 1
T 2
T 3
T 4
W r i t e t o P o r t
R e a d f r o m P o r t
S y s t e m C l o c k
P o r t D a t a
Read/Write Timing



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