TLE7239SL datasheet(32/37 Pages) INFINEON

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Data Sheet

Rev. 1.0, 2010-02-18

SPI Driver for Enhanced Relay Control

TLE7239SL

Serial Peripheral Interface (SPI)

9.6

Electrical Characteristics

Unless otherwise specified:

DD = 3.0 V to 5.5V, VBAT = 9.0 V to 16V, Tj = -40 °C to +150 °C

typical values:

DD = 5.0 V, VBAT = 13.5 V, Tj = 25 °C

Pos. Parameter

Symbol

Limit Values

Unit Test Conditions

min.

typ.

max.

Input Characteristics (CS, SCLK, SI)

9.6.1 L level of pin

SCLK

CS(L)

SCLK(L)

SI(L)

0–

0.2*

DD V–

9.6.2 H level of pin

SCLK

CS(H)

SCLK(H)

SI(H)

0.5*

DD –

V–

9.6.3 L-input pull-up current through CS

CS(L)

540

µA

CS = 0 V

DD = 5 V

9.6.4 H-input pull-up current through CS

CS(H)

2.5

–

µA

DD = 5 V

CS = 0.5*VDD

9.6.5 L-input pull-down current through pin

SCLK

SCLK(L)

SI(L)

1.5

–

µA

DD = 5 V

SCLK = VSI = 0.2*VDD

9.6.6 H-input pull-down current through pin

SCLK

SCLK(H)

SI(H)

µA

DD= 5 V

SCLK = VSI = VDD

Output Characteristics (SO)

9.6.7 L level output voltage

SO(L)

0–

0.4

SO = +2 mA

9.6.8 H level output voltage

SO(H)

DD -

0.4 V

–

SO = -1.5 mA

9.6.9 Output tristate leakage current

SO(OFF)

-10

–

µA

CS = VDD

Timings

9.6.10 Serial clock frequency

SCLK

0–

5MHz –

9.6.11 Serial clock period

SCLK(P)

200

–

9.6.12 Serial clock high time

SCLK(H)

–

9.6.13 Serial clock low time

SCLK(L)

–

9.6.14 Enable lead time (falling CS to rising

SCLK)

CS(lead)

250

–

9.6.15 Enable lag time (falling SCLK to rising

CS )

CS(lag)

250

–

9.6.16 Transfer delay time (rising CS to

falling CS )

CS(td)

250

–

9.6.17 Data setup time (required time SI to

falling SCLK)

SI(su)

–

9.6.18 Data hold time (falling SCLK to SI)

SI(h)

–

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