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LPC4350 Datasheet(PDF) 88 Page - NXP Semiconductors |
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LPC4350 Datasheet(HTML) 88 Page - NXP Semiconductors |
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88 / 145 page  LPC4350_30_20_10 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Objective data sheet Rev. 2.1 — 23 September 2011 88 of 145 NXP Semiconductors LPC4350/30/20/10 32-bit ARM Cortex-M4/M0 microcontroller The LPC4350/30/20/10 can wake up from Deep-sleep, Power-down, and Deep power-down modes via the WAKEUP[3:0] pins and interrupts generated by battery powered blocks in the RTC power domain. 7.23 Serial Wire Debug/JTAG Debug and trace functions are integrated into the ARM Cortex-M4. Serial wire debug and trace functions are supported in addition to a standard JTAG debug and parallel trace functions. The ARM Cortex-M4 is configured to support up to eight breakpoints and four watch points. The ARM Cortex-M0 coprocessor supports JTAG boundary scan and serial wire debug. |
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