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ICS9LPRS480 Datasheet(PDF) 14 Page - Integrated Device Technology

Part # ICS9LPRS480
Description  Programmable System Clock Chip for ATI RS780 - K8TM based Systems
PDF  25 Pages
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

ICS9LPRS480 Datasheet(HTML) 14 Page - Integrated Device Technology

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14
Integrated
Circuit
Systems, Inc.
ICS9LPRS480
1391D—02/02/09
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
NOTES
Long Accuracy
ppm
see Tperiod min-max values
-300
300
ppm
1,2
66.67MHz output nominal
14.9955
15.0045
ns
2
66.67MHz output spread
14.9955
15.0799
ns
2
Output High Voltage
VOH
IOH = -1 mA
1.6
1.8
V
1
Output Low Voltage
VOL
IOL = 1 mA
0
0.2
V
1
Rise Time
tr1
VOL = 0.36 V, VOH = 1.44 V
1.5
ns
1
Fall Time
tf1
VOH = 1.44 V, VOL = 0.36 V
1.5
ns
1
Duty Cycle
dt1
VT = 0.9 V
45
55
%
1
Jitter, Cycle to cycle
tjcyc-cyc
VT = 0.9 V
300
ps
1
Jitter, Long Term
tLTJ
VT = 0.9 V
1
ns
1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 33Ω (unless otherwise specified)
1Guaranteed by design and characterization, not 100% tested in production.
2 All Long Term Accuracy and Clock Period specifications are guaranteed with the assumption that REF is at 14.31818MHz
Electrical Characteristics - Single-ended HTT 66MHz Clock
HTT66 Clock period
Tperiod
Electrical Characteristics - USB - 48MHz
PARAMETER
SYMBOL
CONDITIONS*
MIN
TYP
MAX
UNITS
NOTES
Long Accuracy
ppm
see Tperiod min-max values
-100
100
ppm
1,2
Clock period
Tperiod
48.00MHz output nominal
20.8229
20.8344
ns
2
Clock Low Time
Tlow
Measure from < 0.6V
9.3750
11.4580
ns
2
Clock High Time
Thigh
Measure from > 2.0V
9.3750
11.4580
ns
2
Output High Voltage
VOH
IOH = -1 mA
2.4
V
1
Output Low Voltage
VOL
IOL = 1 mA
0.55
V
1
V OH @MIN = 1.0 V
-33
mA
1
VOH@MAX = 3.135 V
-33
mA
1
VOL @ MIN = 1.95 V
30
mA
1
VOL @ MAX = 0.4 V
38
mA
1
Rise Time
tr_USB
VOL = 0.4 V, VOH = 2.4 V
0.5
1.5
ns
1
Fall Time
tf_USB
VOH = 2.4 V, VOL = 0.4 V
0.5
1.5
ns
1
Duty Cycle
dt1
VT = 1.5 V
45
55
%
1
Group Skew
tskew
VT = 1.5 V
250
ps
1
Jitter, Cycle to cycle
tjcyc-cyc
VT = 1.5 V
130
ps
1,2
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, CL = 5 pF with Rs = 33Ω (unless otherwise specified)
1Guaranteed by design and characterization, not 100% tested in production.
2ICS recommended and/or chipset vendor layout guidelines must be followed to meet this specification
Output Low Current
IOL
Output High Current
IOH



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