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GS9062-CFE3 Datasheet(PDF) 31 Page - Gennum Corporation

Part # GS9062-CFE3
Description  HD-LINX II SD-SDI and DVB-ASI Serializer with ClockCleaner
PDF  46 Pages
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Manufacturer  GENNUM [Gennum Corporation]
Direct Link  http://www.gennum.com
Logo GENNUM - Gennum Corporation

GS9062-CFE3 Datasheet(HTML) 31 Page - Gennum Corporation

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GS9062 Data Sheet
22209 - 7
February 2007
31 of 46
3.6.3.3 EDH Generation and Insertion
The GS9062 will generate and insert complete EDH packets into the data stream.
Packet generation and insertion will only take place if the EDH_CRC_INS bit of the
IOPROC_DISABLE register is set LOW.
The GS9062 will generate all of the required EDH packet data including all ancillary
data preambles, (DID, DBN, DC), reserved code words and checksum. Calculation
of both full field (FF) and active picture (AP) CRC's will be carried out by the device.
SMPTE RP165 specifies the calculation ranges and scope of EDH data for
standard 525 and 625 component digital interfaces. The GS9062 will utilize these
standard ranges by default.
If the received video format does not correspond to 525 or 625 digital component
video standards as determined by the flywheel pixel and line counters, then one of
two schemes for determining the EDH calculation ranges will be employed:
1. Ranges will be based on the line and pixel ranges programmed by the host
interface; or
2. In the absence of user-programmed calculation ranges, ranges will be
determined from the received TRS ID words or supplied H, V, and F timing
signals Internal Flywheel on page 23.
The registers available to the host interface for programming EDH calculation
ranges include active picture and full field line start and end positions for both
fields. Table 3-8 shows the relevant registers, which default to '0' after device reset.
If any or all of these register values are zero, then the EDH CRC calculation ranges
will be determined from the flywheel generated H signal. The first active and full
field pixel will always be the first pixel after the SAV TRS code word. The last active
and full field pixel will always be the last pixel before the start of the EAV TRS code
words.
EDH error flags (EDH, EDA, IDH, IDA and UES) for ancillary data, full field and
active picture will also be inserted. These flags must be programmed into the
EDH_FLAG registers of the device by the application layer (Table 3-9).
NOTE 1: It is the responsibility of the user to ensure that the EDH flag registers are
updated once per field.
The prepared EDH packet will be inserted at the appropriate line of the video
stream according to RP165. The start pixel position of the inserted packet will be
based on the SAV position of that line such that the last byte of the EDH packet
(the checksum) will be placed in the sample immediately preceding the start of the
SAV TRS word.
NOTE 2: It is also the responsibility of the user to ensure that there is sufficient
space in the horizontal blanking interval for the EDH packet to be inserted.



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