AD9737ABBCZ datasheet(60/64 Pages) AD

60 / 64 page

AD9737A/AD9739A

Data Sheet

Rev. | Page 60 of 64

NONIDEAL SPECTRAL ARTIFACTS

The AD9737A/AD9739A output spectrum contains spectral

artifacts that are not part of the original digital input waveform.

These nonideal artifacts include harmonics (including alias

harmonics), images, and clock spurs. Figure 186 shows a spectral

plot of the AD9737A/AD9739A within the first Nyquist zone

(that is, dc to fDAC/2) reconstructing a 650 MHz, 0 dBFS sine wave

at 2.4 GSPS. Besides the desired fundamental tone at the −7.8 dBm

level, the spectrum also reveals these nonideal artifacts that also

appear as spurs above the measurement noise floor. Because

these nonideal artifacts are also evident in the second and third

Nyquist zones during mix-mode operation, the effects of these

artifacts should also be considered when selecting the DAC

clock rate for a target RF band.

–100

–90

–80

–70

–60

–50

–40

–30

–20

–10

200

400

600

800

1000

1200

FREQUENCY (MHz)

HD3

HD5

HD9

HD6

HD4

FUND AT

–7.6dBm

fDAC/4 –

fOUT

fDAC/2 –

fOUT

fDAC/4

3/4 ×

fDAC/4 –

fOUT

HD2

Figure 186. Spectral Plot

Note the following important observations pertaining to these

nonideal spectral artifacts:

1. A full-scale sine wave (that is, single-tone) typically represents

the worst case condition because it is has a peak-to-rms

ratio of 3 dB and is unmodulated. Harmonics and aliased

harmonics of a sine wave are easy to identify because they

also appear as discrete spurs. Significant characterization of

a high speed DAC is performed using single (or multitone)

signals for this reason.

2. Modulated signals (that is, AM, PM, or FM) do not appear

as spurs but rather as signals whose power spectral density

is spread over a defined bandwidth determined by the

modulation parameters of the signals. Any harmonics from

the DAC spread over a wider bandwidth determined by the

order of the harmonic and bandwidth of the modulated signal.

For this reason, harmonics often appear as slight bumps in

the measurement noise floor and can be difficult to discern.

3. Images appear as replicas of the original signal, hence, can

be easier to identify. In the case of the AD9737A/AD9739A,

internal modulation of the sampling clock at intervals

related to fDAC/4 generate image pairs at ¼ × fDAC, ½ × fDAC,

and ¾ × fDAC. Both upper and lower sideband images

associated with ¼ × fDAC fall within the first Nyquist zone,

whereas only the lower image of ½ × fDAC and ¾ × fDAC fall

back. Note that the lower images appear frequency inverted.

The ratio between the fundamental and various images (that

is, dBc) remains mostly signal independent because the

mechanism causing these images is related to corruption of

the sampling clock.

4. The magnitude of these images for a given device depends

on several factors, including DAC clock rate, output

frequency, and Mu controller phase setting. Because the

image magnitude is repeatable between power-up cycles

(assuming the same conditions), a one-time factory

calibration procedure can be used to improve suppression.

Calibration consists of additional dedicated DSP resources in

the host that can generate a replica of the image with proper

amplitude, phase, and frequency scaling to cancel the image

from the DAC. Because the image magnitude can vary

among devices, each device must be calibrated.

5. A clock spur appears at fDAC/4 and integer multiples of it.

Similar to images, the spur magnitude also depends on the

same factors that cause variations in image levels. However,

unlike images and harmonics, clock spurs always appear

as discrete spurs, albeit their magnitude shows a slight

dependency on the digital waveform and output frequency.

The calibration method is similar to image calibration;

however, only a digital tone of equal amplitude and

opposite phase at fDAC/4 need be generated.

6. A large clock spur also appears at 2 × fDAC in either normal

or mix-mode operation. This clock spur is due to the quad

switch DAC architecture causing switching events to occur

on both edges of fDAC.

AD9737ABBCZ Datasheet(PDF) 60 Page - Analog Devices

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