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TSU6111ARSVR Datasheet(PDF) 11 Page - Texas Instruments |
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TSU6111ARSVR Datasheet(HTML) 11 Page - Texas Instruments |
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11 / 32 page  TSU6111A www.ti.com SCDS331 – FEBRUARY 2012 Power-On Reset When power (from 0 V) is applied to VBAT, an internal power-on reset holds the TSU6111A in a reset condition until VBAT has reached VPOR. Once VBAT has reached VPOR, the reset condition is released, and the TSU6111A registers and I2C state machine initialize to their default states. After the initial power-up phase, VBAT must be lowered to below 0.2 V and then back up to the operating voltage (VDDIO) for a power-reset cycle. Software Reset The TSU6111A has software reset feature. • Hold low both I2C_SCL and I2C_SDA for more than 30ms to reset digital logic of the TSU6111A. After resetting the digital logic, INTB will keep low until INT_Mask bit of Control register (0x02) is cleared. Figure 1. Software Reset Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): TSU6111A |
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