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PTH08T255W Datasheet(PDF) 4 Page - Texas Instruments |
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PTH08T255W Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 35 page ![]() ELECTRICAL CHARACTERISTICS PTH08T255W SLTS290 – NOVEMBER 2008 ........................................................................................................................................................................................... www.ti.com PTH08T255W TA = 25°C, VI = 12 V, VO = 3.3 V, CI = 1000 µF, CO = 1000 µF, and IO = IO max (unless otherwise stated) PARAMETER TEST CONDITIONS PTH08T255W UNIT MIN TYP MAX 25°C, natural convection 0 40 IO Output current Over VO range A 60°C, 200 LFM 0 40 VI Input voltage range Over IO and VO range 8.0 14 V VOADJ Output voltage adjust range Over IO range 3.0 5.25 V Set-point voltage tolerance ±0.5 ±1 (1) %Vo Temperature variation –40°C < TA < 85°C ±0.3 %Vo VO Line regulaltion Over VI range ±5 mV Load regulation Over IO range ±5 mV Total output variation Includes set-point, line, load, –40°C ≤ TA ≤ 85°C ±1.5 (1) %Vo RSET = 1.36 kΩ, VO = 5.0 V 95% η Efficiency IO = 30 A RSET = 34.5 kΩ, VO = 3.3 V 94% VO Ripple (peak-to-peak) 20-MHz bandwidth 20 mVPP ILIM Overcurrent threshold Reset, followed by auto-recovery 80 A ttr Recovery time 200 µs w/o TurboTrans CO= 1000 µF, TypeC ΔVtr VO over/undershoot 135 mV 2.5 A/µs load step Transient response 50 to 100% IOmax ttrTT w/ TurboTrans Recovery time 400 µs CO= 5000 µF, TypeC mV ΔVtrTT VO over/undershoot 35 RTT = short IIL Track input current (pin 20) Pin to GND –130(2) µA dVtrack/dt Track slew rate capability CO ≤ CO (max) 1 V/ms VI increasing, RUVLO = OPEN 7.2 8.0 Adjustable Under-voltage lockout UVLOADJ VI decreasing, RUVLO = OPEN 6.7 V (pin 21) Hysteresis 0.5 Input high voltage (VIH) Open(3) V Inhibit control (pin 21) Input low voltage (VIL) -0.2 0.6 Input low current (IIL ), Pin 21 to GND -125 µA Iin Input standby current Inhibit (pin 21) to GND, Track (pin 20) open 35 mA f s Switching frequency Over VI and IO ranges, SmartSync (pin 22) to GND 600 (4) kHz fSYNC Synchronization frequency applied to pin 22 240 (4) 400 (4) kHz VSYNCH SYNC High-Level Input Voltage 2.0 5.5 V Synchronization (SYNC) control (pin 22) VSYNCL SYNC Low-Level Input Voltage 0.8 V tSYNC SYNC Minimum Pulse Width 200 nSec Nonceramic 1000 (5) CI External input capacitance µF Ceramic 22 (1) The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a tolerance of 1% with 100 ppm/C or better temperature stability. (2) A low-leakage (<100 nA), open-drain device, such as MOSFET or voltage supervisor IC, is recommended to control pin 20. When using this feature, a 100k Ω pull-up resistor to VI is required. If unused, this pin must be directly connected to VI. See the Auto-Track section of the datasheet for more information. (3) Do not place an external pull-up on this pin. If it is left open-circuit, the module operates when input power is applied. A small, low-leakage (<100 nA) MOSFET is recommended for control. For additional information, see the On/Off Inhibit section of the datasheet. (4) The PTH08T255W is a two-phase power module. Each phase switches at 300kHz typical, 180° out of phase from one another. The over-all switching frequency is 600 kHz typical. SmartSync controls the frequency of an individual phase. (5) A 1000 µF electrolytic input capacitor is required for proper operation. The input capacitor must be rated for a minimum of 750 mA rms of ripple current. 4 Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): PTH08T255W |
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