RM48L930 datasheet(46/147 Pages) TI1

46 / 147 page

RM48L930

RM48L730

RM48L530

SPNS176

– SEPTEMBER 2011

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System Information and Electrical Specifications

4.1

Device Power Domains

The device core logic is split up into multiple power domains in order to optimize the power for a given

application use case. There are 8 core power domains in total: PD1, PD2, PD3, PD4, PD5, RAM_PD1,

RAM_PD2 and RAM_PD3.

The actual contents of these power domains are indicated in .

PD1 is an "always-ON" power domain, which cannot be turned off. Each of the other core power domains

can be turned ON/OFF one time during device initialization as per the application requirement. Refer to

the Power Management Module (PMM) chapter of the device technical reference manual for more details.

NOTE

The clocks to a module must be turned off before powering down the core domain that

contains the module.

NOTE

The logic in the modules that are powered down loses its power completely. Any access to

modules that are powered down results in an abort being generated. When power is

restored, the modules power-up to their default states (after normal power-up). No register or

memory contents are preserved in the core domains that are turned off.

System Information and Electrical Specifications

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RM48L930 Datasheet(PDF) 46 Page - Texas Instruments