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RM48L930 Datasheet(PDF) 76 Page - Texas Instruments |
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RM48L930 Datasheet(HTML) 76 Page - Texas Instruments |
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76 / 147 page ![]() RM48L930 RM48L730 RM48L530 SPNS176 – SEPTEMBER 2011 www.ti.com The parity protection for peripheral RAMs is not enabled by default and must be enabled by the application. Each individual peripheral contains control registers to enable the parity protection for accesses to its RAM. NOTE The CPU read access gets the actual data from the peripheral. The application can choose to generate an interrupt whenever a peripheral RAM parity error is detected. 76 System Information and Electrical Specifications Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback focus.ti.com: RM48L930 RM48L730 RM48L530 |
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