XIO2221 datasheet(36/196 Pages) TI1

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SDA

SCL

Start

Condition

Stop

Condition

Changeof

Data Allowed

DataLineStable,

DataValid

SCL From

Master

SDA Output

ByTransmitter

SDA Output

ByReceiver

XIO2221

SCPS216A – JULY 2009 – REVISED FEBRAURY 2010

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3.5.2

Serial-Bus Interface Protocol

All data transfers are initiated by the serial-bus master. The beginning of a data transfer is indicated by a

start condition, which is signaled when the SDA line transitions to the low state while SCL is in the high

state (see Figure 3-7). The end of a requested data transfer is indicated by a stop condition, which is

signaled by a low-to-high transition of SDA while SCL is in the high state (see Figure 3-7). Data on SDA

must remain stable during the high state of the SCL signal, as changes on the SDA signal during the high

state of SCL are interpreted as control signals, that is, a start or stop condition.

Figure 3-7. Serial-Bus Start/Stop Conditions and Bit Transfers

Data is transferred serially in 8-bit bytes. During a data transfer operation, the exact number of bytes that

are transmitted is unlimited. However, each byte must be followed by an acknowledge bit to continue the

data transfer operation. An acknowledge (ACK) is indicated by the data byte receiver pulling the SDA

signal low, so that it remains low during the high state of the SCL signal. Figure 3-8 shows the

acknowledge protocol.

Figure 3-8. Serial-Bus Protocol Acknowledge

The bridge performs three basic serial-bus operations: single-byte reads, single-byte writes, and multibyte

reads. The single-byte operations occur under software control. The multibyte read operations are

performed by the serial EEPROM initialization circuitry immediately after a PCIe reset (see Section 3.5.3,

Serial-Bus EEPROM Application, for details on how the bridge automatically loads the subsystem

identification and other register defaults from the serial-bus EEPROM.

Figure 3-9 shows a single-byte write. The bridge issues a start condition and sends the 7-bit slave device

address, and the R/W command bit is equal to 0b. A 0b in the R/W command bit indicates that the data

transfer is a write. The slave device acknowledges if it recognizes the slave address. If no

acknowledgment is received by the bridge, bit 1 (SB_ERR) is set in the serial-bus control and status

another slave acknowledgment is expected. Then the bridge delivers the data-byte most significant bit

(MSB) first and expects a final acknowledgment before issuing the stop condition.

Feature/Protocol Descriptions

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