Top View

Bottom View

1

VIN1

VIN1

ON

VBIAS

VIN2

VIN2

1

ON2

VOUT2

VOUT1

CT

GND

1

CT2

VOUT2

VOUT1

14

14

1

VOUT2

VOUT1

GND

CT1

CT2

VOUT2

VOUT1

VIN1

VIN1

VBIAS

VIN2

VIN2

ON1

ON2

TPS22966

www.ti.com

SLVSBH4A – JUNE 2012 – REVISED JULY 2012

DPU PACKAGE

PIN TABLE

TPS22966

PIN NAME

I/O

DESCRIPTION

DPU

1

VIN1

I

Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for

2

VIN1

I

Switch #1 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for

3

ON1

I

Active high switch #1 control input. Do not leave floating.

4

VBIAS

I

Bias voltage. Power supply to the device. Recommended voltage range for this pin is 2.5V to 5.5V.

See Application Information section.

5

ON2

I

Active high switch #2 control input. Do not leave floating.

6

VIN2

I

Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for

7

VIN2

I

Switch #2 input. Bypass this input with a ceramic capacitor to GND. Recommended voltage range for

8

VOUT2

O

Switch #2 output.

9

VOUT2

O

Switch #2 output.

10

CT2

O

Switch #2 slew rate control. Can be left floating.

11

GND

–

Ground

12

CT1

O

Switch #1 slew rate control. Can be left floating.

13

VOUT1

O

Switch #2 output.

14

VOUT1

O

Switch #2 output.

15

Thermal Pad

O

Thermal pad (exposed center pad) to alleviate thermal stress. Tie to GND. See Application

Information for layout guidelines.

Copyright © 2012, Texas Instruments Incorporated

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Product Folder Link(s): TPS22966