TNETEL1200

EtherLoop

™ MODEM

SPHS003D – FEBRUARY 1999 – REVISED JUNE 1999

17

POST OFFICE BOX 655303

CAPTURE RAM INTERFACE

switching characteristics over recommended ranges of supply voltage and operating free-air

temperature

read cycle (see Figure 10)

NO.

PARAMETER

MIN

MAX

UNIT

1

ta

Read access time

45

ns

2

td

Data delay time from RAMOEN

30

ns

3

th

Data hold time after RAMOEN

0

ns

2

3

1

RAMADDR

RAMDAT

RAMOEN

RAMRWN

Figure 10. Read Cycle

write cycle (see Figure 11)

NO.

PARAMETER

MIN

MAX

UNIT

1

tsu(ADDR) Address setup time

70

ns

2

tsu(DATA)

Data setup time to RAMRWN

12

ns

3

tw

Pulse width, RAMRWN low

22

ns

4

th

Data and address hold time after RAMRWN

30

ns

RAMADDR

RAMDAT

RAMOEN

RAMRWN

1

2

4

3

Figure 11. Write Cycle