AMG-DF102

Full Bridge MOSFET/IGBT Driver up to 600V

5.10. UV Detection for the High Side

• Detecting under voltage conditions during power up and during operation. Pulling the high

side drivers low in case of too low a supply.

5.11. DRV

• CMOS gate driver output stage for low and high side.

6. Pinning

PIN#

Symbol

Description

1

INB

Logic input for high side gate driver output OHB

2

ENQ

Input to enable device operation (active low)

3

GND

Ground

4

PGND

Power Ground

5

OL1

Low side gate driver output, inverted to IN1

6

n.c.

7

VB1

High side gate driver supply

8

OH1

High side gate driver output, in phase with IN1

9

VS1

High side gate driver supply return

10

n.c.

11

VBH

High side buck driver supply

12

OHB

High side gate driver output, in phase with INB

13

VSH

High side buck driver supply return

14

n.c.

15

n.c.

16

VS2

High side gate driver supply return

17

OH2

High side gate driver output, in phase with IN2

18

VB2

High side gate driver supply

19

n.c.

20

VDD

Low side driver supply

21

OL2

Low side gate driver output, inverted to IN2

22

VCC

Logic supply

23

IN2

Input for high and low side gate drive outputs OH2 + OL2

24

IN1

Input for high and low side gate drive outputs OH1 + OL1

AMG-DF102

Revision: AB

30. Nov. 2010

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