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CXR702F080 Datasheet(PDF) 24 Page - Sony Corporation

Part # CXR702F080
Description  CMOS 32-bit Single Chip Microcomputer
PDF  32 Pages
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Manufacturer  SONY [Sony Corporation]
Direct Link  http://www.sony.co.jp
Logo SONY - Sony Corporation

CXR702F080 Datasheet(HTML) 24 Page - Sony Corporation

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CXR702F080
Item
I/O leakage
current
Supply
current∗2
Input
capacity
Symbol
IZH
IZL
IDD1
IDDI1
IDDS1
IDDS2
CIN
Pins
PD2, PD3, PM, AN0 to AN3,
DREQ0, DREQ1, MSDIO,
MSINS, PA to PC, PE to PL,
PN, PO, WAIT, INT0 to INT9,
EC0, EC2, CT0ED0, CT0ED1,
CT1ED0, CT1ED1, CT2ED0,
CT2ED1, RxD0, RxD1,
MD0 to MD7, D0 to D15,
SCK0 to SCK2, SI0 to SI2,
SCS0 to SCS2
PD2, PD3, PM, AN0 to AN3,
DREQ0, DREQ1, MSDIO,
MSINS, PA to PC, PE to PL,
PN, PO, WAIT, INT0 to INT9,
EC0, EC2, CT0ED0, CT0ED1,
CT1ED0, CT1ED1, CT2ED0,
CT2ED1, RxD0, RxD1,
MD0 to MD7, D0 to D15,
SCK0 to SCK2, SI0 to SI2,
SCS0 to SCS2∗1
VDD
PA to PC, PD2, PD3, PE to PO,
WAIT, INT0 to INT9, EC0,
EC2, CT0ED0, CT0ED1,
CT1ED0, CT1ED1, CT2ED0,
CT2ED1, RxD0, RxD1,
MD0 to MD7, D0 to D15,
AN0 to AN3, SCK0 to SCK2,
SI0 to SI2, SCS0 to SCS2,
MSDIO, EXTAL, TEX, RST,
TEST0
DREQ0, DREQ1, MSINS,
TDI, TMS, TRST, TCK,
TEST1, TEST2, PWE
Conditions
VI = 3.6V
VI = 0V
Main execution mode
18.432MHz crystal
oscillation (C1 = C2 = 10pF)
Main idle mode
18.432MHz crystal
oscillation (C1 = C2 = 10pF)
Sub sleep mode
32.768kHz crystal
oscillation (C1 = C2 = 10pF)
Ta = –20 to +25°C
Stop mode
32.768kHz oscillation stop
Ta = –20 to +25°C
Clock 1MHz
0V other than the
measured pins
Min.
Typ.
Max.
10
–10
60
32
500
80
500
50
11
9
Unit
µA
µA
mA
mA
µA
µA
µA
µA
pF
pF
∗1 PA to PC, PE to PL, PN, PO, WAIT, INT0 to INT9, EC0, EC2, CT0ED0, CT0ED1, CT1ED0, CT1ED1,
CT2ED0, CT2ED1, RxD0, RxD1, MD0 to MD7, D0 to D15, SCK0 to SCK2, SI0 to SI2 and SCS0 to
SCS2 pins specify the input current when the pull-up resistor is selected, and specify leakage current
when non-resistor is selected.
∗2 When all output pins are left open and XOUT/CKO = “L” (POSL register SLCKO bit = “00” or “01”).



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