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CXR702F080 Datasheet(PDF) 28 Page - Sony Corporation |
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CXR702F080 Datasheet(HTML) 28 Page - Sony Corporation |
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28 / 32 page ![]() – 28 – CXR702F080 (3) Serial transfer (memory stick) (Topr = –20 to +75°C, VDD = 2.7 to 3.6V, Vss = 0V reference) Notes) 1. The load condition is 26pF. 2. fMSCK is as follows for output fSRC of main oscillation circuit. Item MSSCLK cycle time MSSCLK high, low pulse width MSBS output delay time MSDIO output delay time MSDIO input setup time MSDIO input hold time MSDIR output delay time Symbol tKCY tKH tKL tBSD tDIOD tDIOS tDIOH tDIRD Pins MSSCLK MSSCLK MSBS MSDIO MSDIO MSDIO MSDIR Min. 1000/fMSCK 500/fMSCK – 5 18 5 Max. 10 10 10 Unit ns ns ns ns ns ns ns Conditions For MSSCLK ↓ For MSSCLK ↓ For MSSCLK ↑ For MSSCLK ↑ For MSSCLK ↓ Shift clock frequency division ratio No frequency division 2 frequency division 4 frequency division 8 frequency division fMSCK (MHz) fSRC fSRC/2 fSRC/4 fSRC/8 |
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