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WM8352 Datasheet(PDF) 133 Page - Wolfson Microelectronics plc |
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WM8352 Datasheet(HTML) 133 Page - Wolfson Microelectronics plc |
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133 / 336 page ![]() Production Data WM8352 w PD, February 2011, Rev 4.4 133 The DC-DC Converters and the LDO Regulators have a first-level interrupt, UV_INT (see Section 24). This comprises second-level interrupts from each of the DC-DC Converters and the LDO Regulators. Each DC-DC Converter has a dedicated second-level interrupt which indicates an under-voltage condition. These can be masked by setting the applicable mask bit as defined in Table 80. ADDRESS BIT LABEL DESCRIPTION R28 (1Ch) Under Voltage Interrupt Status 5 UV_DC6_EINT DCDC6 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. 4 UV_DC5_EINT DCDC5 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. 3 UV_DC4_EINT DCDC4 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. 2 UV_DC3_EINT DCDC3 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. 1 UV_DC2_EINT DCDC2 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. 0 UV_DC1_EINT DCDC1 Under-voltage interrupt. (Rising Edge triggered) Note: This bit is cleared once read. R36 (24h) Under Voltage Interrupt Mask as in R28 “IM_” + name of respective bit in R28 Mask bits for DC-DC converter under- voltage interrupts Each of these bits masks the respective bit in R28 when it is set to 1 (e.g. UV_DC1_EINT in R28 does not trigger a UV_INT interrupt when IM_UV_DC1_EINT in R36 is set). Note: there is no over-current fault condition for converters 2 and 5. Table 80 DC-DC Converter Interrupts |
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