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PXD10PB Datasheet(PDF) 17 Page - Freescale Semiconductor, Inc

Part # PXD10PB
Description  32-bit Power Architecture짰 Microcontrollers for Entry Level Display Solutions
PDF  26 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

PXD10PB Datasheet(HTML) 17 Page - Freescale Semiconductor, Inc

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Features
PXD10 Product Brief, Rev. 1
Freescale Semiconductor
17
2.4.16
Controller Area Network (CAN) module
The PXD10 contains two CAN modules that offer the following features:
•
Compliant with CAN protocol specification, Version 2.0B active
•
64 mailboxes, each configurable as transmit or receive
— Mailboxes configurable while module remains synchronized to CAN bus
•
Transmit features
— Supports configuration of multiple mailboxes to form message queues of scalable depth
— Arbitration scheme according to message ID or message buffer number
— Internal arbitration to guarantee no inner or outer priority inversion
— Transmit abort procedure and notification
•
Receive features
— Individual programmable filters for each mailbox
— 8 mailboxes configurable as a 6-entry receive FIFO
— 8 programmable acceptance filters for receive FIFO
•
Programmable clock source
— System clock
— Direct oscillator clock to avoid PLL jitter
•
Listen only mode capabilities
•CAN Sampler
— Can catch the first message sent on the CAN network while the PXD10 is stopped. This
guarantees a clean startup of the system without missing messages on the CAN network.
— The CAN sampler is connected to one of the CAN RX pins.
2.4.17
Inter-IC Communications (I2C) module
The I2C module features the following:
•
Up to four I2C modules supported
•
Two-wire bi-directional serial bus for on-board communications
•
Compatibility with I2C bus standard
•
Multimaster operation
•
Software-programmable for one of 256 different serial clock frequencies
•
Software-selectable acknowledge bit
•
Interrupt-driven, byte-by-byte data transfer
•
Arbitration-lost interrupt with automatic mode switching from master to slave
•
Calling address identification interrupt
•
Start and stop signal generation/detection
•
Repeated START signal generation
•
Acknowledge bit generation/detection



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