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RT9722 Datasheet(PDF) 10 Page - Richtek Technology Corporation

Part # RT9722
Description  145m廓, 1.5A Power Switch with Programmable Current Limit
PDF  14 Pages
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Manufacturer  RICHTEK [Richtek Technology Corporation]
Direct Link  http://www.richtek.com
Logo RICHTEK - Richtek Technology Corporation

RT9722 Datasheet(HTML) 10 Page - Richtek Technology Corporation

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RT9722
10
DS9722-00 August 2011
www.richtek.com
pin requires a pull-up resistor, this resistor should be large
in value to reduce energy drain. A 100k pull-up resistor
works well for most applications. In the case of an over-
current condition, FLG will be asserted only after the flag
response delay time, tD, has elapsed. This ensures that
FLG is asserted only upon valid over-current conditions
and that erroneous error reporting is eliminated.
For example, false over-current conditions may occur
during hot-plug events when a highly large capacitive load
is connected and causes a high transient inrush current
that exceeds the current limit threshold. The FLG response
delay time tD is typically 12ms at VIN = 5V.
Under-Voltage Lockout
Under-voltage lockout (UVLO) prevents the MOSFET
switch from turning on until input voltage exceeds
approximately 2V. Under-voltage detection functions only
when the chip enable input is enabled.
Thermal Shutdown
Thermal shutdown is employed to protect the device from
damage if the die temperature exceeds approximately
150
°C. If enabled, the switch automatically restarts when
the die temperature falls 20
°C (typ.). The output will
continue to cycle on and off until the device is disabled or
the fault is removed.
Short Circuit Protection
The current limit circuitry prevents damage to the MOSFET
switch and external load. When a heavy load or short
circuit is applied to an enabled switch, a large transient
current may flow until the current limit circuitry responds.
Once this current limit threshold is exceeded, the device
enters constant current mode until the thermal shutdown
occurred or the fault is removed.
Supply Filter/Bypass Capacitor
A 1
μF low-ESR ceramic capacitor from VIN to GND (the
amount of the capacitance may be increased without limit),
located at the device is strongly recommended to prevent
the input voltage drooping during hot-plug events. However,
higher capacitor values will further reduce the voltage droop
on the input. Furthermore, without the bypass capacitor,
an output short may cause sufficient ringing on the input
(from source lead inductance) to destroy the internal
control circuitry. An important note to be award of is the
parasitic inductance of PCB traces can cause over-voltage
transients if the PCB trace has even a few tens of nH of
inductance. The input transient must not exceed 6.0V of
the absolute maximum supply voltage even for a short
duration.
Power Dissipation
The device's junction temperature depends on several
factors such as the load, PCB layout, ambient temperature
and package type. The maximum output current must be
derated at higher ambient temperature to ensure the
junction temperature does not exceed operating junction
temperature 125
°C. With all possible conditions, the
junction temperature must be within the range specified
under operating conditions. Power dissipation can be
calculated based on the output current and the RDS(ON) of
switch as below.
PD = RDS(ON) x IOUT2
The application may limit the amount of output current
based on the total power dissipation and the ambient
temperature.
Thermal Considerations
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
PD(MAX) = (TJ(MAX)
− TA) / θJA
Where TJ(MAX) is the maximum operation junction
temperature, TA is the ambient temperature and the
θJAis
the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT9722, the maximum operating junction temperature is
125
°C. The junction to ambient thermal resistance θJA for
SOT-23-5/SOT-23-6 package is 250
°C/W and WDFN-6L
2x2 package is 165
°C/W on the standard JEDEC 51-3
single-layer thermal test board. The maximum power
dissipation at TA = 25
°C can be calculated by following
formula :
PD(MAX) = (125
°C − 25°C) / (250°C/W) = 0.4W for
SOT-23-5/SOT-23-6 package



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