AD8108AST datasheet(20/28 Pages) AD

20 / 28 page

AD8108/AD8109

–20–

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From a circuit standpoint, this output crosstalk mechanism

looks like a transformer, with a mutual inductance between the

windings, that drives a load resistor. For low frequencies, the

magnitude of the crosstalk is given by:

|XT| = 20 log10 (Mxy

× s/R

where Mxy is the mutual inductance of output x to output y and

RL is the load resistance on the measured output. This crosstalk

mechanism can be minimized by keeping the mutual inductance

low and increasing RL. The mutual inductance can be kept low

by increasing the spacing of the conductors and minimizing

their parallel length.

PCB Layout

Extreme care must be exercised to minimize additional crosstalk

generated by the system circuit board(s). The areas that must be

carefully detailed are grounding, shielding, signal routing and

supply bypassing.

The packaging of the AD8108/AD8109 is designed to help keep

the crosstalk to a minimum. Each input is separated from each

other input by an analog ground pin. All of these AGNDs

should be directly connected to the ground plane of the circuit

board. These ground pins provide shielding, low impedance

return paths and physical separation for the inputs. All of these

help to reduce crosstalk.

Each output is separated from its two neighboring outputs by an

analog ground pin in addition to an analog supply pin of one

polarity or the other. Each of these analog supply pins provides

power to the output stages of only the two nearest outputs.

These supply pins and analog grounds provide shielding, physi-

cal separation and a low impedance supply for the outputs.

Individual bypassing of each of these supply pins, with a 0.01

µF

chip capacitor directly to the ground plane, minimizes high

frequency output crosstalk via the mechanism of sharing com-

mon impedances.

Each output also has an on-chip compensation capacitor that

is individually tied the nearby analog ground pins AGND00

through AGND07. This technique reduces crosstalk by prevent-

ing the currents that flow in these paths from sharing a common

impedance on the IC and in the package pins. These AGNDxx

signals should all be directly connected to the ground plane.

The input and output signals will have minimum crosstalk if

they are located between ground planes on layers above and

below, and separated by ground in between. Vias should be

located as close to the IC as possible to carry the inputs and

outputs to the inner layer. The only place the input and output

signals surface is at the input termination resistors and the out-

put series back termination resistors. These signals should also

be separated, to the extent possible, as soon as they emerge from

the IC package.

Evaluation Board

A four-layer evaluation board for the AD8108/AD8109 is avail-

able. The exact same board and external components are used

for each device. The only difference is the device itself, which

offers a selection of a gain of unity or gain of two through the

analog channels. This board has been carefully laid out and

tested to demonstrate the specified high speed performance of

the device. Figure 46 shows the schematic of the evaluation

board. Figure 47 shows the component side silk-screen. The

layouts of the board’s four layers are given in Figures 48, 49, 50

and 51.

The evaluation board package includes the following:

• Fully populated board with BNC-type connectors.

• Windows™ based software for controlling the board from a

PC via the printer port.

• Custom cable to connect evaluation board to PC.

• Disk containing Gerber files of board layout.

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