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ADV7175 Datasheet(PDF) 14 Page - Analog Devices |
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ADV7175 Datasheet(HTML) 14 Page - Analog Devices |
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14 / 36 page ![]() ADV7175/ADV7176 REV. A –14– PAL = 864 * CLOCK/2 NTSC = 858 * CLOCK/2 PAL = 132 * CLOCK/2 NTSC = 118 * CLOCK/2 LINE 265 LINE 266 HSYNC VSYNC BLANK PIXEL DATA PAL = 12 * CLOCK/2 NTSC = 16 * CLOCK/2 Cb Y Cr Y Cb Figure 23. Timing Mode 2 Odd-to-Even Field Transition Mode 3: Master/Slave Option. HSYNC, BLANK, FIELD. (Timing Register 0 TR0 = X X X X X 1 1 0 or X X X X X 1 1 1) In this mode the ADV7175/ADV7176 accepts or generates Horizontal SYNC and odd/even FIELD signals. A transition of the FIELD input when HSYNC is high indicates a new frame i.e., vertical retrace. The BLANK signal is optional. When the BLANK input is disabled the ADV7175/ADV7176 automatically blanks all normally blank lines as per CCIR-624. Mode 3 is illustrated in Figure 24 (NTSC) and Figure 25 (PAL). 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 283 284 285 ODD FIELD EVEN FIELD DISPLAY DISPLAY VERTICAL BLANK HSYNC BLANK FIELD 522 523 524 525 1 234 5 67 8 9 10 11 20 21 22 DISPLAY DISPLAY VERTICAL BLANK ODD FIELD EVEN FIELD HSYNC BLANK FIELD Figure 24. Timing Mode 3 (NTSC) |
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