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ORLI10G Datasheet(PDF) 13 Page - Agere Systems |
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ORLI10G Datasheet(HTML) 13 Page - Agere Systems |
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13 / 72 page ![]() Agere Systems Inc. 13 Data Sheet October 2001 10 Gbits/s, and 12.5 Gbits/s Line Interface FPSC ORCA ORLI10G Quad 2.5 Gbits/s ORLI10G Overview (continued) 1018(F) Figure 1. ORCA ORLI10G Block Diagram EMBEDDED CORE FPGA LOGIC (400K GATES) TRANSMIT PLLs REFERENCE CLOCK TRANSMIT DATA 16 x 622 OR 16 x 645 OR 16 x 667 OR 64:16 MUX OR 128:16 MUX TRANSMIT CLOCK RECEIVE PLLs 16:64 DEMUX OR 16:128 DEMUX RECEIVE DATA 16 x 622 OR 16 x 645 OR 16 x 667 OR FOUR 2.5 Gbit RXCLKs 64-bit OR 128-bit RXCLK 64-bit OR 128-bit TXCLK (167 MHz—78 MHz) (167 MHz—78 MHz) SYSTEM INTERFACE: — POS-PHY 4 — XGMII — 156 MHz PECL (OC-48/STM-16 SONET/SDH) — USER DEFINED 16 x 781 Mbits/s 16 x 781 Mbits/s 2 2 |
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