WM8788 datasheet(9/22 Pages) WOLFSON

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Preliminary Technical Data

WM8788

PTD, December 2010, Rev 2.2

AUDIO INTERFACE TIMING

MASTER MODE

BCLK

(output)

LRCLK

(output)

ADCDAT

(output)

tDDA

tDL

Figure 3 Audio Interface Timing - Master Mode

Test Conditions

AVDD = REFVDD = 3.3V, AGND = 0V,

TA = +25

oC, 1kHz signal, fs = 48kHz, 24-bit audio data unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Audio Interface Timing - Master Mode

LRCLK propagation delay from BCLK falling edge

tDL

ADCDAT propagation delay from BCLK falling edge

tDDA

SLAVE MODE

Figure 4 Audio Interface Timing - Slave Mode

Test Conditions

AVDD = REFVDD = 3.3V, AGND = 0V,

TA = +25

oC, 1kHz signal, fs = 48kHz, 24-bit audio data unless otherwise stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

UNIT

Audio Interface Timing - Slave Mode

BCLK cycle time

tBCY

BCLK pulse width high

tBCH

BCLK pulse width low

tBCL

LRCLK set-up time to BCLK rising edge

tLRSU

LRCLK hold time from BCLK rising edge

tLRH

ADCDAT propagation delay from BCLK falling edge

tDD

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