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WM8731SEDS/V Datasheet(PDF) 49 Page - Wolfson Microelectronics plc |
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WM8731SEDS/V Datasheet(HTML) 49 Page - Wolfson Microelectronics plc |
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49 / 65 page  WM8731 / WM8731L Production Data w PD, Rev 4.9, October 2012 49 The device can be powered off by writing to the POWEROFF bit of the Power Down register. In POWEROFF mode the Control Interface and a small portion of the digital remain active. The analogue VMID reference is disabled. As in STANDBY mode the crystal oscillator and/or CLKOUT pin can be independently controlled. Refer to Table 28. DESCRIPTION 1 0 0 X X X X X POWEROFF, but with Crystal Oscillator OS and CLKOUT available 1 1 0 X X X X X POWEROFF, but with Crystal Oscillator OS available, CLKOUT not-available 1 1 1 X X X X X POWEROFF, Crystal oscillator and CLKOUT not-available. Table 28 Poweroff Mode REGISTER MAP The complete register map is shown in Table 29. The detailed description can be found in Table 30 and in the relevant text of the device description. There are 11 registers with 16 bits per register (7 bit address + 9 bits of data). These can be controlled using either the 2 wire or 3 wire MPU interface. REGISTER BIT[8] BIT[7] BIT[6] BIT[5] BIT[4] BIT[3] BIT[2] BIT[1] BIT[0] DEFAULT R0 (00h) Left Line In LRINBOTH LINMUTE 0 0 LINVOL[4:0] 0_1001_0111 R1 (01h) Right Line In RLINBOTH RINMUTE 0 0 RINVOL[4:0] 0_1001_0111 R2 (02h) Left Headphone Out LRHPBOTH LZCEN LHPVOL[6:0] 0_0111_1001 R1 (01h) Right Headphone Out RLHPBOTH RZCEN RHPVOL[6:0] 0_0111_1001 R4 (04h) Analogue Audio Path Control 0 SIDEATT[1:0] SIDETONE DACSEL BYPASS INSEL MUTEMIC MICBOOST 0_0000_1010 R5 (05h) Digital Audio Path Control 0 0 0 0 HPOR DACMU DEEMPH[1:0] ADCHPD 0_0000_1000 R6 (06h) Power Down Control 0 POWEROFF CLKOUTPD OSCPD OUTPD DACPD ADCPD MICPD LINEINPD 0_1001_1111 R7 (07h) Digital Audio Interface Format 0 BCLKINV MS LRSWAP LRP IWL[1:0] FORMAT[1:0] 0_1001_1111 R8 (08h) Sampling Control 0 CLKODIV2 CLKIDIV2 SR[3:0] BOSR USB/ NORMAL 0_0000_0000 R9 (09h) Active Control 0 0 0 0 0 0 0 0 Active 0_0000_0000 R15 (0Fh) Reset RESET[8:0] not reset Table 29 Register Map |
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