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WM8731SEDS/V Datasheet(PDF) 17 Page - Wolfson Microelectronics plc |
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WM8731SEDS/V Datasheet(HTML) 17 Page - Wolfson Microelectronics plc |
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17 / 65 page  WM8731 / WM8731L Production Data w PD, Rev 4.9, October 2012 17 DIGITAL AUDIO INTERFACE – SLAVE MODE BCLK ADCDAT ADCLRC DACDAT DACLRC WM8731 CODEC DSP ENCODER/ DECODER Note: The ADC and DAC can run at different rates Figure 5 Slave Mode Connection BCLK DACLRC/ ADCLRC t BCH t BCL t BCY DACDAT ADCDAT t LRSU t DS t LRH t DH t DD Figure 6 Digital Audio Data Timing – Slave Mode Test Conditions AVDD, HPVDD, DBVDD = 3.3V, AGND = 0V, DCVDD = 1.5V, DGND = 0V, TA = +25 oC, Slave Mode, fs = 48kHz, XTI/MCLK = 256fs unless otherwise stated. PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNIT Audio Data Input Timing Information BCLK cycle time tBCY 50 ns BCLK pulse width high tBCH 20 ns BCLK pulse width low tBCL 20 ns DACLRC/ADCLRC set-up time to BCLK rising edge tLRSU 10 ns DACLRC/ADCLRC hold time from BCLK rising edge tLRH 10 ns DACDAT set-up time to BCLK rising edge tDS 10 ns DACDAT hold time from BCLK rising edge tDH 10 ns |
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