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MCP79411 Datasheet(PDF) 38 Page - Microchip Technology |
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MCP79411 Datasheet(HTML) 38 Page - Microchip Technology |
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38 / 60 page ![]() MCP79410/MCP79411/MCP79412 DS20002266E-page 38 2010-2013 Microchip Technology Inc. 10.2 EEPROM The MCP794XX features 1Kbits of internal high endurance EEPROM. This EEPROM block features an 8-byte page. 10.2.1 BLOCK PROTECTION The EEPROM does not support a hardware write protection pin, however, software block protection is available to the user and is configured using the STATUS register. 10.2.2 STATUS REGISTER The STATUS register is in the nonvolatile EEPROM array. To access the STATUS register, the address of 0xFFh is written to and read from. ACK polling may be used to determine if the write is complete. The bits in this register are defined as: • Bit 3:2 (BP<1:0>) are the EEPROM array block protection bits. If an attempt is made to perform a write to an area of EEPROM that is protected, the MCP794XX will acknowledge but the write will not take place. These bits are in the nonvolatile EEPROM array. This allows protection of the following areas: • The unused bits are reserved at this time and read as ‘0’. • With the current address read operation, the address is not incremented. Consequently, the subsequent reads are done from the same location. If multiple bytes are loaded to the STATUS register, only the last byte is written. The write to the STATUS register is initiated by the I2C Stop condition. TABLE 10-1: BLOCK PROTECTION BP1 BP0 Array Addresses Write-Protected 00 None 01 Upper 1/4 (60h-7Fh) 10 Upper 1/2 (40h-7Fh) 11 All (00h-7Fh) REGISTER 10-1: STATUS REGISTER 0XFF UU U U R/W-0 R/W-0 U U — — — — BP1 BP0 — — bit 7 bit 3 bit 2 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set “0” = Bit is clear “X” = Bit is unknown bit 7-4 Unimplemented: Read as ‘0’ bit 3-2 BP<1:0>: EEPROM Array Block Protection bits bit 1-0 Unimplemented: Read as ‘0’ |
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