PIC24F32KA302 datasheet(71/364 Pages) MICROCHIP

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DS39995D-page 71

PIC24FV32KA304 FAMILY

TABLE 7-1:

RESET FLAG BIT OPERATION

bit 5

SWDTEN: Software Enable/Disable of WDT bit(2)

1 = WDT is enabled

0 = WDT is disabled

bit 4

WDTO: Watchdog Timer Time-out Flag bit

1 = WDT time-out has occurred

0 = WDT time-out has not occurred

bit 3

SLEEP: Wake-up from Sleep Flag bit

1 = Device has been in Sleep mode

0 = Device has not been in Sleep mode

bit 2

IDLE: Wake-up from Idle Flag bit

1 = Device has been in Idle mode

0 = Device has not been in Idle mode

bit 1

BOR: Brown-out Reset Flag bit

1 = A Brown-out Reset has occurred (the BOR is also set after a POR)

0 = A Brown-out Reset has not occurred

bit 0

POR: Power-on Reset Flag bit

1 = A Power-up Reset has occurred

0 = A Power-up Reset has not occurred

Flag Bit

Setting Event

Clearing Event

TRAPR (RCON<15>)

Trap Conflict Event

POR

IOPUWR (RCON<14>)

Illegal Opcode or Uninitialized W Register Access

POR

CM (RCON<9>)

Configuration Mismatch Reset

POR

EXTR (RCON<7>)

MCLR Reset

POR

SWR (RCON<6>)

RESET Instruction

POR

WDTO (RCON<4>)

WDT Time-out

PWRSAV Instruction, POR

SLEEP (RCON<3>)

PWRSAV #SLEEP Instruction

POR

IDLE (RCON<2>)

PWRSAV #IDLE Instruction

POR

BOR (RCON<1>)

POR, BOR

—

POR (RCON<0>)

POR

—

DPSLP (RCON<10>)

PWRSAV #SLEEP Instruction with DSEN (DSCON<15>) Set

POR

Note: All Reset flag bits may be set or cleared by the user software.

RCON: RESET CONTROL REGISTER(1) (CONTINUED)

Note 1:

All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not

cause a device Reset.

If the FWDTENx Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled regardless of the

SWDTEN bit setting.

This is implemented on PIC24FV32KA3XX parts only; not used on PIC24F32KA3XX devices.

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