PIC24F32KA302 datasheet(180/364 Pages) MICROCHIP

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PIC24FV32KA304 FAMILY

DS39995D-page 180

 2011-2013 Microchip Technology Inc.

UxMODE: UARTx MODE REGISTER

R/W-0

U-0

R/W-0

U-0

R/W-0(2)

UARTEN

—

USIDL

IREN(1)

RTSMD

—

UEN1

UEN0

bit 15

bit 8

R/C-0, HC

R/W-0

R/W-0, HC

R/W-0

WAKE

LPBACK

ABAUD

RXINV

BRGH

PDSEL1

PDSEL0

STSEL

bit 7

bit 0

Legend:

C = Clearable bit

HC = Hardware Clearable bit

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 15

UARTEN: UARTx Enable bit

1 = UARTx is enabled: All UARTx pins are controlled by UARTx, as defined by UEN<1:0>

0 = UARTx is disabled: All UARTx pins are controlled by port latches; UARTx power consumption is

minimal

bit 14

Unimplemented: Read as ‘0’

bit 13

USIDL: UARTx Stop in Idle Mode bit

1 = Discontinues module operation when the device enters Idle mode

0 = Continues module operation in Idle mode

bit 12

IREN: IrDA® Encoder and Decoder Enable bit(1)

1 = IrDA encoder and decoder are enabled

0 = IrDA encoder and decoder are disabled

bit 11

RTSMD: Mode Selection for UxRTS Pin bit

1 =UxRTS pin is in Simplex mode

0 =UxRTS pin is in Flow Control mode

bit 10

Unimplemented: Read as ‘0’

bit 9-8

UEN<1:0>: UARTx Enable bits(2)

11 = UxTX, UxRX and UxBCLK pins are enabled and used; UxCTS pin is controlled by port latches

10 = UxTX, UxRX, UxCTS and UxRTS pins are enabled and used

01 = UxTX, UxRX and UxRTS pins are enabled and used; UxCTS pin is controlled by port latches

00 = UxTX and UxRX pins are enabled and used; UxCTS and UxRTS/UxBCLK pins are controlled by

port latches

bit 7

WAKE: Wake-up on Start Bit Detect During Sleep Mode Enable bit

1 = UARTx will continue to sample the UxRX pin; interrupt is generated on the falling edge, bit is

cleared in hardware on the following rising edge

0 = No wake-up is enabled

bit 6

LPBACK: UARTx Loopback Mode Select bit

1 = Enables Loopback mode

0 = Loopback mode is disabled

bit 5

ABAUD: Auto-Baud Enable bit

1 = Enables baud rate measurement on the next character – requires reception of a Sync field (55h);

cleared in hardware upon completion

0 = Baud rate measurement is disabled or completed

bit 4

RXINV: Receive Polarity Inversion bit

1 = UxRX Idle state is ‘0’

0 = UxRX Idle state is ‘1’

Note 1:

This feature is is only available for the 16x BRG mode (BRGH = 0).

The bit availability depends on the pin availability.

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