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PIC24F32KA302-I/ML Datasheet(PDF) 197 Page - Microchip Technology |
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PIC24F32KA302-I/ML Datasheet(HTML) 197 Page - Microchip Technology |
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197 / 364 page ![]() 2011-2013 Microchip Technology Inc. DS39995D-page 197 PIC24FV32KA304 FAMILY FIGURE 19-2: ALARM MASK SETTINGS 19.5 POWER CONTROL The RTCC includes a power control feature that allows the device to periodically wake-up an external device, wait for the device to be stable before sampling wake-up events from that device and then shut down the external device. This can be done completely autonomously by the RTCC, without the need to wake from the current low-power mode (Sleep, Deep Sleep, etc.). To enable this feature, the RTCC must be enabled (RTCEN = 1), the PWCEN register bit must be set and the RTCC pin must be driving the PWC control signal (RTCOE = 1 and RTCOUT<1:0> = 11). The polarity of the PWC control signal may be chosen using the PWCPOL register bit. Active-low or active-high may be used with the appropriate external switch to turn on or off the power to one or more exter- nal devices. The active-low setting may also be used in conjunction with an open-drain setting on the RTCC pin. This setting is able to drive the GND pin(s) of the external device directly (with the appropriate external VDD pull-up device), without the need for external switches. Finally, the CHIME bit should be set to enable the PWC periodicity. Note 1: Annually, except when configured for February 29. s ss ms s mm s s hh m m s s dh h m m s s dd h h m m s s mm d d h h m m s s Day of the Week Month Day Hours Minutes Seconds Alarm Mask Setting (AMASK<3:0>) 0000 - Every half second 0001 - Every second 0010 - Every 10 seconds 0011 - Every minute 0100 - Every 10 minutes 0101 - Every hour 0110 - Every day 0111 - Every week 1000 - Every month 1001 - Every year(1) |
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