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SST38VF6402B Datasheet(PDF) 11 Page - Microchip Technology

Part # SST38VF6402B
Description  64 Mbit (x16) Advanced Multi-Purpose Flash Plus
PDF  58 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

SST38VF6402B Datasheet(HTML) 11 Page - Microchip Technology

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 2013 Microchip Technology Inc.
Preliminary
DS25002B-page 11
SST38VF6401B / SST38VF6402B / SST38VF6403B / SST38VF6404B
4.8.3
DQ1
If an operation aborts during a Write-to-Buffer or Pro-
gram Buffer-to-Flash operation, DQ1 is set to ‘1’. To
reset DQ1 to ‘0’, issue the Write-to-Buffer Abort Reset
command to exit the abort state. A power-off/power-on
cycle or a Hardware Reset (RST# = 0) will also clear
DQ1.
4.8.4
RY/BY#
The RY/BY# pin can be used to determine the status of
a Program or Erase operation. The RY/BY# pin is valid
after the rising edge of the final WE# pulse in the com-
mand sequence. If RY/BY# = 0, then the device is
actively programming or erasing. If RY/BY# = 1, the
device is in Read mode. The RY/BY# pin is an open
drain output pin. This means several RY/BY# can be
tied together with a pull-up resistor to VDD..
4.9
Data Protection
The SST38VF6401B/6402B/6403B/6404B provide both
hardware and software features to protect nonvolatile
data from inadvertent writes.
4.9.1
HARDWARE DATA PROTECTION
4.9.1.1
Noise/Glitch Protection
A WE# or CE# pulse of less than 5 ns will not initiate a
write cycle.
4.9.1.2
VDD Power Up/Down Detection
The Write operation is inhibited when VDD is less than
1.5V.
4.9.1.3
Write Inhibit Mode
Forcing OE# low, CE# high, or WE# high will inhibit the
Write operation. This prevents inadvertent writes dur-
ing power-up or power-down.
4.9.2
HARDWARE BLOCK PROTECTION
The SST38VF6402B and SST38VF6404B devices
support top hardware block protection, which protects
the top boot block of the device. For SST38VF6402B,
the boot block consists of the top 32 KWord block, and
for SST38VF6404B the boot block consists of the top
two 4 KWord blocks (8 KWord total).
The SST38VF6401B and SST38VF6403B devices
support bottom hardware block protection, which pro-
tects the bottom boot block of the device. For
SST38VF6401B, the boot block consists of the bottom
32 KWord block, and for SST38VF6403B the Boot
Block consists of the bottom two 4 KWord blocks (8
KWord total). The boot block addresses are described
in Table 4-2.
TABLE 4-1:
WRITE OPERATION STATUS
Status
DQ7
1
DQ6
DQ2
1
DQ1
RY/BY#2
Normal
Operation
Standard Program
DQ7#
Toggle
No Toggle 0
0
Standard Erase
0
Toggle
Toggle
N/A
0
Erase-Suspend
Mode
Read from Erase-Suspended Block 1
No
toggle
Toggle
N/A
1
Read from Non- Erase-Suspended
Block
Data
Data
Data
Data
1
Program
DQ7#
Toggle
N/A
N/A
0
Program Buffer-
to-Flash
Busy
DQ7#
3
Toggle
N/A
0
0
Abort
DQ7#
3
Toggle
N/A
1
0
1. DQ7 and DQ2 require a valid address when reading status information.
2. RY/BY# is an open drain pin. RY/BY# is high in Read mode, and Read in Erase-Suspend mode.
3. During a Program Buffer-to-Flash operation, the datum on the DQ7 pin is the complement of DQ7 of the last word loaded in
the Write-Buffer using the Write-to-Buffer command.



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