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HT45F4M Datasheet(PDF) 11 Page - Holtek Semiconductor Inc

Part # HT45F4M
Description  Lithium Battery Backup Power ASSP MCU
PDF  138 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT45F4M Datasheet(HTML) 11 Page - Holtek Semiconductor Inc

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Rev. 1.10
10
�an�a�� 1�� �01�
Rev. 1.10
11
�an�a�� 1�� �01�
HT45F4M
Lithium Battery Backup Power ASSP MCU
HT45F4M
Lithium Battery Backup Power ASSP MCU
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
VDD
Conditions
IOH�
I/O Po�t So��ce C���ent
(PB4� PB�)
�V
VOH= 0.9VDD
-8
-16
—
mA
�V
VOH= 0.9VDD
-�0
-40
—
mA
VLVR
Low Voltage Reset Voltage
—
—
-�%×
T�p.
�.��
-�%×
T�p.
V
VLVD1
Low Voltage Detecto�
Voltage
—
LVDEN= 1� VLVD = �.7V
-�%×
T�p.
�.7
-�%×
T�p.
V
VLVD�
LVDEN= 1� VLVD = �.0V
�.0
V
VLVD�
LVDEN= 1� VLVD = �.�V
�.�
V
VLVD4
LVDEN= 1� VLVD = �.6V
�.6
V
VLVD�
LVDEN= 1� VLVD = 4.0V
4.0
V
ILVR
Additional Powe�
Cons�mption if LVR is
�sed
�V
LVR enable
—
�0
4�
μA
�V
—
60
90
μA
ILVD
Additional Powe�
Cons�mption if LVD is �sed
�V
LVD disable → LVD enable
(LVR enable)
—
�0
4�
μA
�V
—
60
90
μA
RPH
P�ll-high Resistance fo�
I/O Po�ts
�V
—
�0
60
100
kΩ
�V
—
10
�0
�0
kΩ
Note:LVRisawaysenabled(HALTmodedisabled)fixed@2.55V.
A.C. Characteristics
Ta= ��°C
Symbol
Parameter
Test Conditions
Min.
Typ.
Max. Unit
VDD
Conditions
fCPU
Ope�ating Clock
�.7V~�.�V
—
DC
—
7.�
MHz
4.�V~�.�V
DC
—
1�
MHz
fSYS
S�stem Clock (HIRC)
�.7V~�.�V
—
—
—
7.�
MHz
4.�V~�.�V
—
—
1�
MHz
fHIRC
HIRC F�eq�enc� (note)
�V
Ta= ��°C
-�%
�0
+�%
MHz
4.0V~�.�V Ta= -10°C~8�°C
-�%
�0
+�%
MHz
�.6V~�.�V Ta= -40°C~8�°C
-10%
�0
+10% MHz
fSUB
S�stem Clock (LIRC)
�V
Ta= ��°C
-10%
��
+10% kHz
�.7V~�.�V Ta= -40°C~8�°C
-�0%
��
+60% kHz
tTIMER
TCKn Inp�t Pin Minim�m
P�lse Width
—
—
—
�0
—
ns
tINT
Inte���pt Minim�m P�lse Width
—
—
1
�.�
�
μs
tLVR
Low Voltage Width to Reset
—
—
1�0
�40
480
μs
tLVD
Low Voltage Width to Inte���pt
—
—
�0
4�
90
μs
tLVDS
LVDO Stable Time
—
Fo� LVR enable�
LVD off → on
1�
—
—
μs
tSRESET
Softwa�e Reset Width to Reset
—
—
4�
90
1�0
μs
tEERD
EEPROM Read Time
—
—
—
�
4
tSYS
tEEWR
EEPROM W�ite Time
—
—
—
�
4
ms
tSST
S�stem Sta�t-�p Time� Pe�iod
(Wake-�p f�om HALT� fSYS off
at HALT state)
—
fSYS= HIRC
—
16
—
tSYS
—
fSYS= LIRC
—
�
—
tSYS
S�stem Sta�t-�p Time� Pe�iod
(Wake-�p f�om HALT� fSYS on
at HALT state)
—
—
—
�
—
tSYS



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