DAC0830, DAC0832

SNAS534B – MAY 1999 – REVISED MARCH 2013

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*TIE TO LOGIC 1 IF NOT NEEDED (SEE Double-Buffered Operation).

Figure 13. Controlling Mutiple DACs

Figure 14.

The ILE pin is an active high chip select which can be decoded from the address bus as a qualifier for the normal

CS signal generated during a write operation. This can be used to provide a higher degree of decoding unique

control signals for a particular DAC, and thereby create a more efficient addressing scheme.

Another useful application of the ILE pin of each DAC in a multiple DAC system is to tie these inputs together

and use this as a control line that can effectively “freeze” the outputs of all the DAC's at their present value.

Pulling this line low latches the input register and prevents new data from being written to the DAC. This can be

particularly useful in multiprocessing systems to allow a processor other than the one controlling the DAC's to

take over control of the data bus and control lines. If this second system were to use the same addresses as

those decoded for DAC control (but for a different purpose) the ILE function would prevent the DAC's from being

erroneously altered.

In a “Stand-Alone” system the control signals are generated by discrete logic. In this case double-buffering can

the changing of the analog output.

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