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JS28F256P30B95A Datasheet(PDF) 24 Page - Micron Technology

Part # JS28F256P30B95A
Description  Numonyx StrataFlash Embedded Memory
PDF  97 Pages
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Manufacturer  MICRON [Micron Technology]
Direct Link  http://www.micron.com
Logo MICRON - Micron Technology

JS28F256P30B95A Datasheet(HTML) 24 Page - Micron Technology

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P30
Datasheet
August 2008
24
306666-12
6.0
Command Set
6.1
Device Command Codes
The system CPU provides control of all in-system read, write, and erase operations of
the device via the system bus. The on-chip Write State Machine (WSM) manages all
block-erase and word-program algorithms.
Device commands are written to the Command User Interface (CUI) to control all flash
memory device operations. The CUI does not occupy an addressable memory location;
it is the mechanism through which the flash device is controlled.
Table 11: Command Codes and Definitions (Sheet 1 of 2)
Mode
Code
Device Mode
Description
Read
0xFF
Read Array
Places the device in Read Array mode. Array data is output on DQ[15:0].
0x70
Read Status
Register
Places the device in Read Status Register mode. The device enters this mode
after a program or erase command is issued. Status Register data is output
on DQ[7:0].
0x90
Read Device ID
or Configuration
Register
Places device in Read Device Identifier mode. Subsequent reads output
manufacturer/device codes, Configuration Register data, Block Lock status,
or Protection Register data on DQ[15:0].
0x98
Read CFI
Places the device in Read CFI mode. Subsequent reads output Common Flash
Interface information on DQ[7:0].
0x50
Clear Status
Register
The WSM can only set Status Register error bits. The Clear Status Register
command is used to clear the SR error bits.
Write
0x40
Word Program
Setup
First cycle of a 2-cycle programming command; prepares the CUI for a write
operation. On the next write cycle, the address and data are latched and the
WSM executes the programming algorithm at the addressed location. During
program operations, the device responds only to Read Status Register and
Program Suspend commands. CE# or OE# must be toggled to update the
Status Register in asynchronous read. CE# or ADV# must be toggled to
update the Status Register Data for synchronous Non-array reads. The Read
Array command must be issued to read array data after programming has
finished.
Write
0x10
Alternate Word
Program Setup
Equivalent to the Word Program Setup command, 0x40.
0xE8
Buffered Program
This command loads a variable number of words up to the buffer size of 32
words onto the program buffer.
0xD0
Buffered Program
Confirm
The confirm command is Issued after the data streaming for writing into the
buffer is done. This instructs the WSM to perform the Buffered Program
algorithm, writing the data from the buffer to the flash memory array.
0x80
BEFP Setup
First cycle of a 2-cycle command; initiates Buffered Enhanced Factory
Program mode (BEFP). The CUI then waits for the BEFP Confirm command,
0xD0, that initiates the BEFP algorithm. All other commands are ignored
when BEFP mode begins.
0xD0
BEFP Confirm
If the previous command was BEFP Setup (0x80), the CUI latches the
address and data, and prepares the device for BEFP mode.



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