33FJ128GP708 datasheet(30/90 Pages) MICROCHIP

30 / 90 page

dsPIC33F

DS70155C-page 28

Preliminary

8.5

Input Capture Module

The input capture module is useful in applications

requiring frequency (period) and pulse measurement.

The dsPIC33F devices support up to eight input

capture channels.

The input capture module captures the 16-bit value of

the selected time base register when an event occurs

at the ICx pin. The events that cause a capture event

are listed below in three categories:

Simple Capture Event modes

- Capture timer value on every falling edge of

input at ICx pin

- Capture timer value on every rising edge of

input at ICx pin

Capture timer value on every edge (rising and

falling)

Prescaler Capture Event modes

- Capture timer value on every 4th rising

edge of input at ICx pin

- Capture timer value on every 16th rising

edge of input at ICx pin

Each input capture channel can select between one of

two 16-bit timers (Timer2 or Timer3) for the time base.

The selected timer can use either an internal or an

external clock.

Other operational features include:

• Device wake-up from capture pin during CPU

Sleep and Idle modes

• Interrupt on input capture event

• 4-word FIFO buffer for capture values

- Interrupt optionally generated after 1, 2, 3 or

4 buffer locations are filled

• Input capture can also be used to provide

additional sources of external interrupts.

Input capture channels IC1 and IC2 support DMA data

transfers.

8.6

Output Compare/PWM Module

The output compare module features are quite useful

in applications that require controlled timing pulses or

PWM modulated pulse streams.

The output compare module has the ability to compare

the value of a selected time base with the value of one

or two compare registers (depending on the operation

mode selected). Furthermore, it has the ability to

generate a single output pulse, or a repetitive

sequence of output pulses, on a compare match event.

Like most dsPIC33F peripherals, it also has the ability

to generate interrupts on compare match events.

The dsPIC33F device may have up to eight output

compare channels, designated OC1 through OC8.

Refer to the specific device data sheet for the number

of channels available in a particular device. All output

compare channels are functionally identical.

Each output compare channel can use one of two

selectable time bases. The time base is selected using

the OCTSEL bit (OCxCON<3>). An ‘x’ in the pin,

compare channel. Refer to the device data sheet for the

specific timers that can be used with each output

compare channel number.

Each output compare module has the following modes

of operation:

• Single Compare Match mode

• Dual Compare Match mode generating

- Single Output Pulse

- Continuous Output Pulses

• Simple Pulse-Width Modulation mode

- With Fault Protection Input

- Without Fault Protection Input

Output compare channels, OC1 and OC2, support

DMA data transfers.

8.7

Data Converter Interface Module

The dsPIC33F Data Converter Interface (DCI) module

allows simple interfacing to devices such as audio

coder/decoders (codecs), A/D Converters and D/A

Converters.

The following interfaces are supported:

• Framed Synchronous Serial Transfer (Single or

Multi-Channel)

• Inter-IC Sound (I2S) Interface

• AC-Link (AC’97) Compliant mode

Many codecs intended for use in audio applications

support sampling rates between 8 kHz and 48 kHz and

use one of the interface protocols listed above. The

DCI

automatically

handles

the

interface

timing

associated with these codecs. No overhead from the

CPU is required until the requested amount of data has

been transmitted and/or received by the DCI. Up to four

data words can be transferred between CPU interrupts.

The data word length for the DCI is programmable up

to 16 bits to match the data size of the dsPIC33F CPU.

However, many codecs have data word sizes greater

than 16 bits. Long data word lengths can be supported

by the DCI. The DCI is configured to transmit/receive

the long word in multiple 16-bit time slots. This

operation is transparent to the user and the long data

word is stored in consecutive register locations.

33FJ128GP708 Datasheet(PDF) 30 Page - Microchip Technology

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